drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/gpio/hw_gpio.h
Extension
.h
Size
3962 bytes
Lines
154
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct addr_mask {
	uint32_t addr;
	uint32_t mask;
};

struct hw_gpio_pin {
	const struct hw_gpio_pin_funcs *funcs;
	enum gpio_id id;
	uint32_t en;
	enum gpio_mode mode;
	bool opened;
	struct dc_context *ctx;
};

struct hw_gpio_pin_funcs {
	void (*destroy)(
		struct hw_gpio_pin **ptr);
	bool (*open)(
		struct hw_gpio_pin *pin,
		enum gpio_mode mode);
	enum gpio_result (*get_value)(
		const struct hw_gpio_pin *pin,
		uint32_t *value);
	enum gpio_result (*set_value)(
		const struct hw_gpio_pin *pin,
		uint32_t value);
	enum gpio_result (*set_config)(
		struct hw_gpio_pin *pin,
		const struct gpio_config_data *config_data);
	enum gpio_result (*change_mode)(
		struct hw_gpio_pin *pin,
		enum gpio_mode mode);
	void (*close)(
		struct hw_gpio_pin *pin);
};


struct hw_gpio;

/* Register indices are represented by member variables
 * and are to be filled in by constructors of derived classes.
 * These members permit the use of common code
 * for programming registers, where the sequence is the same
 * but register sets are different.
 * Some GPIOs have HW mux which allows to choose
 * what is the source of the signal in HW mode */

struct hw_gpio_pin_reg {
	struct addr_mask DC_GPIO_DATA_MASK;
	struct addr_mask DC_GPIO_DATA_A;
	struct addr_mask DC_GPIO_DATA_EN;
	struct addr_mask DC_GPIO_DATA_Y;
};

struct hw_gpio_mux_reg {
	struct addr_mask GPIO_MUX_CONTROL;
	struct addr_mask GPIO_MUX_STEREO_SEL;
};

struct hw_gpio {
	struct hw_gpio_pin base;

	/* variables to save register value */
	struct {
		uint32_t mask;
		uint32_t a;
		uint32_t en;
		uint32_t mux;
	} store;

	/* GPIO MUX support */
	bool mux_supported;
	const struct gpio_registers *regs;
};

#define HW_GPIO_FROM_BASE(hw_gpio_pin) \
	container_of((hw_gpio_pin), struct hw_gpio, base)

void dal_hw_gpio_construct(
	struct hw_gpio *pin,
	enum gpio_id id,
	uint32_t en,
	struct dc_context *ctx);

bool dal_hw_gpio_open(
	struct hw_gpio_pin *pin,
	enum gpio_mode mode);

enum gpio_result dal_hw_gpio_get_value(
	const struct hw_gpio_pin *pin,

Annotation

Implementation Notes