drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/gpio/hw_hpd.c- Extension
.c- Size
- 3670 bytes
- Lines
- 150
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dm_services.hinclude/gpio_interface.hinclude/gpio_types.hhw_gpio.hhw_hpd.hreg_helper.hhpd_regs.h
Detected Declarations
struct gpiofunction dal_hw_hpd_destructfunction dal_hw_hpd_destroyfunction dal_hw_hpd_get_valuefunction dal_hw_hpd_set_configfunction dal_hw_hpd_constructfunction dal_hw_hpd_init
Annotated Snippet
#include "dm_services.h"
#include "include/gpio_interface.h"
#include "include/gpio_types.h"
#include "hw_gpio.h"
#include "hw_hpd.h"
#include "reg_helper.h"
#include "hpd_regs.h"
#undef FN
#define FN(reg_name, field_name) \
gpio_reg_shift(hpd->shifts->field_name), hpd->masks->field_name
#define CTX \
hpd->base.base.ctx
#define REG(reg)\
(hpd->regs->reg)
struct gpio;
static void dal_hw_hpd_destruct(
struct hw_hpd *pin)
{
dal_hw_gpio_destruct(&pin->base);
}
static void dal_hw_hpd_destroy(
struct hw_gpio_pin **ptr)
{
struct hw_hpd *hpd = HW_HPD_FROM_BASE(*ptr);
dal_hw_hpd_destruct(hpd);
kfree(hpd);
*ptr = NULL;
}
static enum gpio_result dal_hw_hpd_get_value(
const struct hw_gpio_pin *ptr,
uint32_t *value)
{
struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
uint32_t hpd_delayed = 0;
/* in Interrupt mode we ask for SENSE bit */
if (ptr->mode == GPIO_MODE_INTERRUPT) {
REG_GET(int_status,
DC_HPD_SENSE_DELAYED, &hpd_delayed);
*value = hpd_delayed;
return GPIO_RESULT_OK;
}
/* in any other modes, operate as normal GPIO */
return dal_hw_gpio_get_value(ptr, value);
}
static enum gpio_result dal_hw_hpd_set_config(
struct hw_gpio_pin *ptr,
const struct gpio_config_data *config_data)
{
struct hw_hpd *hpd = HW_HPD_FROM_BASE(ptr);
if (!config_data)
return GPIO_RESULT_INVALID_DATA;
REG_UPDATE_2(toggle_filt_cntl,
DC_HPD_CONNECT_INT_DELAY, config_data->config.hpd.delay_on_connect / 10,
DC_HPD_DISCONNECT_INT_DELAY, config_data->config.hpd.delay_on_disconnect / 10);
return GPIO_RESULT_OK;
}
static const struct hw_gpio_pin_funcs funcs = {
.destroy = dal_hw_hpd_destroy,
.open = dal_hw_gpio_open,
.get_value = dal_hw_hpd_get_value,
.set_value = dal_hw_gpio_set_value,
.set_config = dal_hw_hpd_set_config,
.change_mode = dal_hw_gpio_change_mode,
.close = dal_hw_gpio_close,
};
static void dal_hw_hpd_construct(
struct hw_hpd *pin,
Annotation
- Immediate include surface: `dm_services.h`, `include/gpio_interface.h`, `include/gpio_types.h`, `hw_gpio.h`, `hw_hpd.h`, `reg_helper.h`, `hpd_regs.h`.
- Detected declarations: `struct gpio`, `function dal_hw_hpd_destruct`, `function dal_hw_hpd_destroy`, `function dal_hw_hpd_get_value`, `function dal_hw_hpd_set_config`, `function dal_hw_hpd_construct`, `function dal_hw_hpd_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.