drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/hpo/dcn401/dcn401_hpo_frl_stream_encoder.h- Extension
.h- Size
- 14008 bytes
- Lines
- 336
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn30/dcn30_vpg.hdcn30/dcn30_afmt.hdcn30/dcn30_hpo_frl_stream_encoder.hstream_encoder.hdml/dml1_frl_cap_chk.h
Detected Declarations
struct dcn401_hpo_frl_stream_encoder_shiftstruct dcn401_hpo_frl_stream_encoder_maskstruct dcn401_hpo_frl_stream_encoder
Annotated Snippet
struct dcn401_hpo_frl_stream_encoder_shift {
DCN401_HDMI_TB_ENC_REG_FIELD_LIST(uint8_t);
DCN42_HDMI_TB_ENC_REG_FIELD_LIST(uint8_t);
};
struct dcn401_hpo_frl_stream_encoder_mask {
DCN401_HDMI_TB_ENC_REG_FIELD_LIST(uint32_t);
DCN42_HDMI_TB_ENC_REG_FIELD_LIST(uint32_t);
};
struct dcn401_hpo_frl_stream_encoder {
struct hpo_frl_stream_encoder base;
const struct dcn30_hpo_frl_stream_enc_registers *regs;
const struct dcn401_hpo_frl_stream_encoder_shift *hpo_se_shift;
const struct dcn401_hpo_frl_stream_encoder_mask *hpo_se_mask;
};
void hpo_enc401_enable(
struct hpo_frl_stream_encoder *enc,
int otg_inst);
void hpo_enc401_unblank(
struct hpo_frl_stream_encoder *enc,
int otg_inst);
void hpo_enc401_read_state(
struct hpo_frl_stream_encoder *enc,
struct hpo_frl_stream_encoder_state *state);
void hpo_enc401_blank(
struct hpo_frl_stream_encoder *enc);
void hpo_enc401_set_hdmi_stream_attribute(
struct hpo_frl_stream_encoder *enc,
struct dc_crtc_timing *crtc_timing,
struct frl_borrow_params *borrow_params,
int odm_combine_num_segments);
void hpo_enc401_update_hdmi_info_packet(
struct dcn401_hpo_frl_stream_encoder *enc401,
uint32_t packet_index,
const struct dc_info_packet *info_packet);
void hpo_enc401_update_hdmi_info_packets(
struct hpo_frl_stream_encoder *enc,
const struct encoder_info_frame *info_frame);
void hpo_enc401_hdmi_set_dsc_config(
struct hpo_frl_stream_encoder *enc,
struct dc_crtc_timing *timing,
uint8_t *dsc_packed_pps);
void hpo_enc401_stop_hdmi_info_packets(
struct hpo_frl_stream_encoder *enc);
void hpo_enc401_setup_hdmi_audio(
struct hpo_frl_stream_encoder *enc,
const struct audio_crtc_info *crtc_info);
void hpo_enc401_hdmi_audio_setup(
struct hpo_frl_stream_encoder *enc,
unsigned int az_inst,
struct audio_info *info,
struct audio_crtc_info *audio_crtc_info);
void hpo_enc401_hdmi_audio_disable(
struct hpo_frl_stream_encoder *enc);
void hpo_enc401_audio_mute_control(
struct hpo_frl_stream_encoder *enc,
bool mute);
void enc401_stream_encoder_set_avmute(
struct hpo_frl_stream_encoder *enc,
bool enable);
void hpo_enc401_set_dynamic_metadata(
struct hpo_frl_stream_encoder *enc,
bool enable_dme,
uint32_t hubp_requestor_id,
enum dynamic_metadata_mode dmdata_mode);
void frl_get_audio_clock_info(
enum dc_color_depth color_depth,
uint32_t frl_character_clock_kHz,
struct frl_audio_clock_info *audio_clock_info);
void dcn401_hpo_frl_stream_encoder_construct(
struct dcn401_hpo_frl_stream_encoder *enc401,
struct dc_context *ctx,
struct dc_bios *bp,
Annotation
- Immediate include surface: `dcn30/dcn30_vpg.h`, `dcn30/dcn30_afmt.h`, `dcn30/dcn30_hpo_frl_stream_encoder.h`, `stream_encoder.h`, `dml/dml1_frl_cap_chk.h`.
- Detected declarations: `struct dcn401_hpo_frl_stream_encoder_shift`, `struct dcn401_hpo_frl_stream_encoder_mask`, `struct dcn401_hpo_frl_stream_encoder`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.