drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.h
Extension
.h
Size
19894 bytes
Lines
371
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DC_HUBBUB_DCN35_H__
#define __DC_HUBBUB_DCN35_H__

#include "dcn32/dcn32_hubbub.h"

#define HUBBUB_REG_LIST_DCN35(id)\
	SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\
	SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B),\
	SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C),\
	SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D),\
	SR(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL),\
	SR(DCHUBBUB_ARB_DRAM_STATE_CNTL),\
	SR(DCHUBBUB_ARB_SAT_LEVEL),\
	SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\
	SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \
	SR(DCHUBBUB_SOFT_RESET),\
	SR(DCHUBBUB_CRC_CTRL), \
	SR(DCN_VM_FB_LOCATION_BASE),\
	SR(DCN_VM_FB_LOCATION_TOP),\
	SR(DCN_VM_FB_OFFSET),\
	SR(DCN_VM_AGP_BOT),\
	SR(DCN_VM_AGP_TOP),\
	SR(DCN_VM_AGP_BASE),\
	HUBBUB_SR_WATERMARK_REG_LIST(), \
	SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_A),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_B),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_C),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_NOM_D),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C),\
	SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D),\
	SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A),\
	SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B),\
	SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C),\
	SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D),\
	SR(DCHUBBUB_DET0_CTRL),\
	SR(DCHUBBUB_DET1_CTRL),\
	SR(DCHUBBUB_DET2_CTRL),\
	SR(DCHUBBUB_DET3_CTRL),\
	SR(DCHUBBUB_COMPBUF_CTRL),\
	SR(COMPBUF_RESERVED_SPACE),\
	SR(DCHUBBUB_DEBUG_CTRL_0),\
	SR(DCHUBBUB_ARB_USR_RETRAINING_CNTL),\
	SR(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A),\
	SR(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B),\
	SR(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C),\
	SR(DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D),\
	SR(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A),\
	SR(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B),\
	SR(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C),\
	SR(DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D),\
	SR(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A),\
	SR(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B),\
	SR(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C),\
	SR(DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D),\
	SR(DCN_VM_FAULT_ADDR_MSB),\
	SR(DCN_VM_FAULT_ADDR_LSB),\
	SR(DCN_VM_FAULT_CNTL),\
	SR(DCN_VM_FAULT_STATUS),\
	SR(SDPIF_REQUEST_RATE_LIMIT),\
	SR(DCHUBBUB_CLOCK_CNTL),\
	SR(DCHUBBUB_SDPIF_CFG0),\
	SR(DCHUBBUB_SDPIF_CFG1),\
	SR(DCHUBBUB_MEM_PWR_MODE_CTRL),\
	SR(DCHUBBUB_ARB_HOSTVM_CNTL),\
	SR(DCHVM_CTRL0),\
	SR(DCHVM_MEM_CTRL),\
	SR(DCHVM_CLK_CTRL),\
	SR(DCHVM_RIOMMU_CTRL0),\
	SR(DCHVM_RIOMMU_STAT0),\
	SR(DCHUBBUB_COMPBUF_CTRL),\
	SR(COMPBUF_RESERVED_SPACE),\
	SR(DCHUBBUB_DEBUG_CTRL_0),\
	SR(DCHUBBUB_CLOCK_CNTL),\
	SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A),\
	SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A),\
	SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B),\
	SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B),\
	SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C),\
	SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C),\
	SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D),\
	SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D),\
	SR(DCHUBBUB_ARB_QOS_FORCE)

/*
 * Not in DCN42B:
 * SR(DCHUBBUB_DEBUG_CTRL_0),
 */
#define HUBBUB_REG_LIST_DCN42B(id)\

Annotation

Implementation Notes