drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/hubbub/dcn42/dcn42_hubbub.c- Extension
.c- Size
- 27087 bytes
- Lines
- 578
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn30/dcn30_hubbub.hdcn31/dcn31_hubbub.hdcn32/dcn32_hubbub.hdcn35/dcn35_hubbub.hdcn401/dcn401_hubbub.hdcn42/dcn42_hubbub.hdm_services.hreg_helper.h
Detected Declarations
function hubbub42_program_urgent_watermarksfunction hubbub42_program_stutter_watermarksfunction hubbub42_program_pstate_watermarksfunction hubbub42_program_usr_watermarksfunction hubbub42_program_stutter_z8_watermarksfunction hubbub42_allow_self_refresh_controlfunction hubbub42_set_sdp_controlfunction hubbub42_program_watermarksfunction hubbub42_set_request_limitfunction dcn42_program_arbiterfunction hubbub42_construct
Annotated Snippet
if (hubbub2->allow_sdpif_rate_limit_when_cstate_req) {
temp |= (1 << 5);
} else {
temp &= ~(1 << 5);
}
REG_UPDATE(DCHUBBUB_CTRL_STATUS, DCHUBBUB_HW_DEBUG, temp);
} else {
wm_pending = true;
}
return wm_pending;
}
static const struct hubbub_funcs hubbub42_funcs = {
.update_dchub = hubbub2_update_dchub,
.init_dchub_sys_ctx = hubbub31_init_dchub_sys_ctx,
.init_vm_ctx = hubbub2_init_vm_ctx,
.dcc_support_swizzle = hubbub3_dcc_support_swizzle,
.dcc_support_pixel_format = hubbub2_dcc_support_pixel_format,
.get_dcc_compression_cap = hubbub3_get_dcc_compression_cap,
.wm_read_state = hubbub35_wm_read_state,
.get_dchub_ref_freq = hubbub35_get_dchub_ref_freq,
.program_watermarks = hubbub42_program_watermarks,
.allow_self_refresh_control = hubbub42_allow_self_refresh_control,
.is_allow_self_refresh_enabled = hubbub1_is_allow_self_refresh_enabled,
.force_wm_propagate_to_pipes = hubbub32_force_wm_propagate_to_pipes,
.force_pstate_change_control = hubbub3_force_pstate_change_control,
.init_watermarks = hubbub35_init_watermarks,
.init_crb = dcn401_init_crb,
.dchvm_init = dcn35_dchvm_init,
.hubbub_read_state = hubbub2_read_state,
.force_usr_retraining_allow = hubbub32_force_usr_retraining_allow,
.set_request_limit = hubbub42_set_request_limit,
.program_det_segments = dcn401_program_det_segments,
.program_compbuf_segments = dcn401_program_compbuf_segments,
.wait_for_det_update = dcn401_wait_for_det_update,
.program_arbiter = dcn42_program_arbiter,
.hubbub_read_reg_state = hubbub3_read_reg_state
};
void hubbub42_construct(struct dcn20_hubbub *hubbub2,
struct dc_context *ctx,
const struct dcn_hubbub_registers *hubbub_regs,
const struct dcn_hubbub_shift *hubbub_shift,
const struct dcn_hubbub_mask *hubbub_mask,
int det_size_kb,
int pixel_chunk_size_kb,
int config_return_buffer_size_kb)
{
hubbub2->base.ctx = ctx;
hubbub2->base.funcs = &hubbub42_funcs;
hubbub2->regs = hubbub_regs;
hubbub2->shifts = hubbub_shift;
hubbub2->masks = hubbub_mask;
hubbub2->detile_buf_size = det_size_kb * 1024;
hubbub2->pixel_chunk_size = pixel_chunk_size_kb * 1024;
hubbub2->crb_size_segs = config_return_buffer_size_kb / DCN42_CRB_SEGMENT_SIZE_KB;
}
Annotation
- Immediate include surface: `dcn30/dcn30_hubbub.h`, `dcn31/dcn31_hubbub.h`, `dcn32/dcn32_hubbub.h`, `dcn35/dcn35_hubbub.h`, `dcn401/dcn401_hubbub.h`, `dcn42/dcn42_hubbub.h`, `dm_services.h`, `reg_helper.h`.
- Detected declarations: `function hubbub42_program_urgent_watermarks`, `function hubbub42_program_stutter_watermarks`, `function hubbub42_program_pstate_watermarks`, `function hubbub42_program_usr_watermarks`, `function hubbub42_program_stutter_z8_watermarks`, `function hubbub42_allow_self_refresh_control`, `function hubbub42_set_sdp_control`, `function hubbub42_program_watermarks`, `function hubbub42_set_request_limit`, `function dcn42_program_arbiter`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.