drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h
Extension
.h
Size
40385 bytes
Lines
956
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dcn_mi_registers {
	HUBP_COMMON_REG_VARIABLE_LIST;
};

struct dcn_mi_shift {
	DCN_HUBP_REG_FIELD_LIST(uint8_t);
};

struct dcn_mi_mask {
	DCN_HUBP_REG_FIELD_LIST(uint32_t);
};

struct dcn_fl_regs_st {
	uint32_t lut_enable;
	uint32_t lut_done;
	uint32_t lut_addr_mode;
	uint32_t lut_width;
	uint32_t lut_mpc_width;
	uint32_t lut_tmz;
	uint32_t lut_crossbar_sel_r;
	uint32_t lut_crossbar_sel_g;
	uint32_t lut_crossbar_sel_b;
	uint32_t lut_addr_hi;
	uint32_t lut_addr_lo;
	uint32_t refcyc_3dlut_group;
	uint32_t lut_fl_bias;
	uint32_t lut_fl_scale;
	uint32_t lut_fl_mode;
	uint32_t lut_fl_format;
};
struct dcn_hubp_reg_state {
	uint32_t hubp_cntl;
	uint32_t mall_config;
	uint32_t mall_sub_vp;
	uint32_t hubp_req_size_config;
	uint32_t hubp_req_size_config_c;
	uint32_t vmpg_config;
	uint32_t addr_config;
	uint32_t pri_viewport_dimension;
	uint32_t pri_viewport_dimension_c;
	uint32_t pri_viewport_start;
	uint32_t pri_viewport_start_c;
	uint32_t sec_viewport_dimension;
	uint32_t sec_viewport_dimension_c;
	uint32_t sec_viewport_start;
	uint32_t sec_viewport_start_c;
	uint32_t surface_config;
	uint32_t tiling_config;
	uint32_t clk_cntl;
	uint32_t mall_status;
	uint32_t measure_win_ctrl_dcfclk;
	uint32_t measure_win_ctrl_dppclk;

	uint32_t blank_offset_0;
	uint32_t blank_offset_1;
	uint32_t cursor_settings;
	uint32_t dcn_cur0_ttu_cntl0;
	uint32_t dcn_cur0_ttu_cntl1;
	uint32_t dcn_cur1_ttu_cntl0;
	uint32_t dcn_cur1_ttu_cntl1;
	uint32_t dcn_dmdat_vm_cntl;
	uint32_t dcn_expansion_mode;
	uint32_t dcn_global_ttu_cntl;
	uint32_t dcn_surf0_ttu_cntl0;
	uint32_t dcn_surf0_ttu_cntl1;
	uint32_t dcn_surf1_ttu_cntl0;
	uint32_t dcn_surf1_ttu_cntl1;
	uint32_t dcn_ttu_qos_wm;
	uint32_t dcn_vm_mx_l1_tlb_cntl;
	uint32_t dcn_vm_system_aperture_high_addr;
	uint32_t dcn_vm_system_aperture_low_addr;
	uint32_t dcsurf_flip_control;
	uint32_t dcsurf_flip_control2;
	uint32_t dcsurf_primary_meta_surface_address;
	uint32_t dcsurf_primary_meta_surface_address_c;
	uint32_t dcsurf_primary_meta_surface_address_high;
	uint32_t dcsurf_primary_meta_surface_address_high_c;
	uint32_t dcsurf_primary_surface_address;
	uint32_t dcsurf_primary_surface_address_c;
	uint32_t dcsurf_primary_surface_address_high;
	uint32_t dcsurf_primary_surface_address_high_c;
	uint32_t dcsurf_secondary_meta_surface_address;
	uint32_t dcsurf_secondary_meta_surface_address_c;
	uint32_t dcsurf_secondary_meta_surface_address_high;
	uint32_t dcsurf_secondary_meta_surface_address_high_c;
	uint32_t dcsurf_secondary_surface_address;
	uint32_t dcsurf_secondary_surface_address_c;
	uint32_t dcsurf_secondary_surface_address_high;
	uint32_t dcsurf_secondary_surface_address_high_c;
	uint32_t dcsurf_surface_control;

Annotation

Implementation Notes