drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_hwseq.c
Extension
.c
Size
5799 bytes
Lines
183
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (update_state->pg_pipe_res_update[PG_DSC][i]) {
			if (pg_cntl->funcs->dsc_pg_control)
				pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false);
		}

		if (update_state->pg_pipe_res_update[PG_HUBP][i] &&
			update_state->pg_pipe_res_update[PG_DPP][i]) {
			if (pg_cntl->funcs->hubp_dpp_pg_control)
				pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false);
		}
	}

	// domain25 currently always on.

	/* this will need all the clients to unregister optc interrupts, let dmubfw handle this */
	if (pg_cntl->funcs->plane_otg_pg_control)
		pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false);

	// domain23 currently always on.
	// domain22 currently always on.
}

/**
 * dcn351_hw_block_power_up() - power up sequence
 *
 * The following sequence describes the ON-OFF (ONO) for power up:
 *
 *	ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
 *	ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
 *	ONO Region 2, DCPG 24: mpc opp optc dwb
 *	ONO Region 3, DCPG 25: hpo - SKIPPED
 *	ONO Region 4, DCPG 0: dchubp0, dpp0
 *	ONO Region 5, DCPG 16: dsc0
 *	ONO Region 6, DCPG 1: dchubp1, dpp1
 *	ONO Region 7, DCPG 17: dsc1
 *	ONO Region 8, DCPG 2: dchubp2, dpp2
 *	ONO Region 9, DCPG 18: dsc2
 *	ONO Region 10, DCPG 3: dchubp3, dpp3
 *	ONO Region 11, DCPG 19: dsc3
 *
 * @dc: Current DC state
 * @update_state: update PG sequence states for HW block
 */
void dcn351_hw_block_power_up(struct dc *dc,
	struct pg_block_update *update_state)
{
	unsigned int i = 0;
	struct pg_cntl *pg_cntl = dc->res_pool->pg_cntl;

	if (!pg_cntl || dc->debug.ignore_pg)
		return;

	// domain22 currently always on.
	// domain23 currently always on.

	/* this will need all the clients to unregister optc interrupts, let dmubfw handle this */
	if (pg_cntl->funcs->plane_otg_pg_control)
		pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true);

	// domain25 currently always on.

	for (i = 0; i < dc->res_pool->pipe_count; i++) {
		if (update_state->pg_pipe_res_update[PG_HUBP][i] &&
			update_state->pg_pipe_res_update[PG_DPP][i]) {
			if (pg_cntl->funcs->hubp_dpp_pg_control)
				pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true);
		}

		if (update_state->pg_pipe_res_update[PG_DSC][i]) {
			if (pg_cntl->funcs->dsc_pg_control)
				pg_cntl->funcs->dsc_pg_control(pg_cntl, i, true);
		}
	}
}

Annotation

Implementation Notes