drivers/gpu/drm/amd/display/dc/inc/core_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/inc/core_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/inc/core_types.h- Extension
.h- Size
- 21334 bytes
- Lines
- 739
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dc.hdce_calcs.hdcn_calcs.hddc_service_types.hdc_bios_types.hmem_input.hhubp.hmpc.hdwb.hhw/dio.hmcif_wb.hpanel_cntl.hdmub/inc/dmub_cmd.hpg_cntl.hsspl/dc_spl.hgrph_object_id.hlink_encoder.hstream_encoder.hclock_source.haudio.hdm_pp_smu.hdm_cp_psp.hlink_hwss.htransform.hdpp.hdml2_0/dml21/inc/dml_top_dchub_registers.hdml2_0/dml21/inc/dml_top_types.h
Detected Declarations
struct resource_poolstruct dc_statestruct resource_contextstruct clk_bw_paramsstruct dc_mcache_paramsstruct resource_funcsstruct audio_supportstruct resource_poolstruct dcn_fe_bandwidthstruct test_pattern_paramsstruct stream_resourcestruct plane_resourcestruct link_resourcestruct link_configstruct pixel_rate_dividerstruct dsc_padding_paramsstruct pipe_ctxstruct link_enc_cfg_contextstruct resource_contextstruct dce_bw_outputstruct dcn_bw_writebackstruct dcn_bw_outputstruct bw_contextstruct dc_dmub_cmdstruct dc_statestruct replay_contextstruct dc_bounding_box_max_clkstruct dc_measured_memory_qosstruct dc_requested_memory_qosenum p_state_switch_methodenum dc_replay_enable
Annotated Snippet
struct resource_funcs {
enum engine_id (*get_preferred_eng_id_dpia)(unsigned int dpia_index);
void (*destroy)(struct resource_pool **pool);
void (*link_init)(struct dc_link *link);
struct panel_cntl*(*panel_cntl_create)(
const struct panel_cntl_init_data *panel_cntl_init_data);
struct link_encoder *(*link_enc_create)(
struct dc_context *ctx,
const struct encoder_init_data *init);
/* Create a minimal link encoder object with no dc_link object
* associated with it. */
struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id);
struct hpo_frl_link_encoder *(*hpo_frl_link_enc_create)(
enum engine_id eng_id,
struct dc_context *ctx);
enum dc_status (*validate_bandwidth)(
struct dc *dc,
struct dc_state *context,
enum dc_validate_mode validate_mode);
void (*calculate_wm_and_dlg)(
struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes,
int pipe_cnt,
int vlevel);
void (*update_soc_for_wm_a)(
struct dc *dc, struct dc_state *context);
unsigned int (*calculate_mall_ways_from_bytes)(
const struct dc *dc,
unsigned int total_size_in_mall_bytes);
void (*prepare_mcache_programming)(
struct dc *dc,
struct dc_state *context);
/**
* @populate_dml_pipes - Populate pipe data struct
*
* Returns:
* Total of pipes available in the specific ASIC.
*/
int (*populate_dml_pipes)(
struct dc *dc,
struct dc_state *context,
display_e2e_pipe_params_st *pipes,
enum dc_validate_mode validate_mode);
/*
* Algorithm for assigning available link encoders to links.
*
* Update link_enc_assignments table and link_enc_avail list accordingly in
* struct resource_context.
*/
void (*link_encs_assign)(
struct dc *dc,
struct dc_state *state,
struct dc_stream_state *streams[],
uint8_t stream_count);
/*
* Unassign a link encoder from a stream.
*
* Update link_enc_assignments table and link_enc_avail list accordingly in
* struct resource_context.
*/
void (*link_enc_unassign)(
struct dc_state *state,
struct dc_stream_state *stream);
enum dc_status (*validate_global)(
struct dc *dc,
struct dc_state *context);
struct pipe_ctx *(*acquire_free_pipe_as_secondary_dpp_pipe)(
const struct dc_state *cur_ctx,
struct dc_state *new_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *opp_head_pipe);
struct pipe_ctx *(*acquire_free_pipe_as_secondary_opp_head)(
const struct dc_state *cur_ctx,
struct dc_state *new_ctx,
const struct resource_pool *pool,
const struct pipe_ctx *otg_master);
void (*release_pipe)(struct dc_state *context,
struct pipe_ctx *pipe,
const struct resource_pool *pool);
enum dc_status (*validate_plane)(
const struct dc_plane_state *plane_state,
struct dc_caps *caps);
Annotation
- Immediate include surface: `dc.h`, `dce_calcs.h`, `dcn_calcs.h`, `ddc_service_types.h`, `dc_bios_types.h`, `mem_input.h`, `hubp.h`, `mpc.h`.
- Detected declarations: `struct resource_pool`, `struct dc_state`, `struct resource_context`, `struct clk_bw_params`, `struct dc_mcache_params`, `struct resource_funcs`, `struct audio_support`, `struct resource_pool`, `struct dcn_fe_bandwidth`, `struct test_pattern_params`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.