drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h- Extension
.h- Size
- 21090 bytes
- Lines
- 490
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
bw_fixed.h
Detected Declarations
struct pipe_ctxstruct dcstruct dc_statestruct dce_bw_outputstruct bw_calcs_dceipstruct bw_calcs_vbiosstruct bw_calcs_dataenum bw_calcs_versionenum bw_defines
Annotated Snippet
struct bw_calcs_dceip {
enum bw_calcs_version version;
uint32_t percent_of_ideal_port_bw_received_after_urgent_latency;
uint32_t max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation;
uint32_t max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation;
bool large_cursor;
uint32_t cursor_max_outstanding_group_num;
bool dmif_pipe_en_fbc_chunk_tracker;
struct bw_fixed dmif_request_buffer_size;
uint32_t lines_interleaved_into_lb;
uint32_t low_power_tiling_mode;
uint32_t chunk_width;
uint32_t number_of_graphics_pipes;
uint32_t number_of_underlay_pipes;
bool display_write_back_supported;
bool argb_compression_support;
struct bw_fixed underlay_vscaler_efficiency6_bit_per_component;
struct bw_fixed underlay_vscaler_efficiency8_bit_per_component;
struct bw_fixed underlay_vscaler_efficiency10_bit_per_component;
struct bw_fixed underlay_vscaler_efficiency12_bit_per_component;
struct bw_fixed graphics_vscaler_efficiency6_bit_per_component;
struct bw_fixed graphics_vscaler_efficiency8_bit_per_component;
struct bw_fixed graphics_vscaler_efficiency10_bit_per_component;
struct bw_fixed graphics_vscaler_efficiency12_bit_per_component;
struct bw_fixed alpha_vscaler_efficiency;
uint32_t max_dmif_buffer_allocated;
uint32_t graphics_dmif_size;
uint32_t underlay_luma_dmif_size;
uint32_t underlay_chroma_dmif_size;
bool pre_downscaler_enabled;
bool underlay_downscale_prefetch_enabled;
struct bw_fixed lb_write_pixels_per_dispclk;
struct bw_fixed lb_size_per_component444;
bool graphics_lb_nodownscaling_multi_line_prefetching;
struct bw_fixed stutter_and_dram_clock_state_change_gated_before_cursor;
struct bw_fixed underlay420_luma_lb_size_per_component;
struct bw_fixed underlay420_chroma_lb_size_per_component;
struct bw_fixed underlay422_lb_size_per_component;
struct bw_fixed cursor_chunk_width;
struct bw_fixed cursor_dcp_buffer_lines;
struct bw_fixed underlay_maximum_width_efficient_for_tiling;
struct bw_fixed underlay_maximum_height_efficient_for_tiling;
struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_multiple_displays_or_single_rotated_display;
struct bw_fixed peak_pte_request_to_eviction_ratio_limiting_single_display_no_rotation;
struct bw_fixed minimum_outstanding_pte_request_limit;
struct bw_fixed maximum_total_outstanding_pte_requests_allowed_by_saw;
bool limit_excessive_outstanding_dmif_requests;
struct bw_fixed linear_mode_line_request_alternation_slice;
uint32_t scatter_gather_lines_of_pte_prefetching_in_linear_mode;
uint32_t display_write_back420_luma_mcifwr_buffer_size;
uint32_t display_write_back420_chroma_mcifwr_buffer_size;
struct bw_fixed request_efficiency;
struct bw_fixed dispclk_per_request;
struct bw_fixed dispclk_ramping_factor;
struct bw_fixed display_pipe_throughput_factor;
uint32_t scatter_gather_pte_request_rows_in_tiling_mode;
struct bw_fixed mcifwr_all_surfaces_burst_time;
};
struct bw_calcs_vbios {
enum bw_defines memory_type;
uint32_t dram_channel_width_in_bits;
uint32_t number_of_dram_channels;
uint32_t number_of_dram_banks;
struct bw_fixed low_yclk; /*m_hz*/
struct bw_fixed mid_yclk; /*m_hz*/
struct bw_fixed high_yclk; /*m_hz*/
struct bw_fixed low_sclk; /*m_hz*/
struct bw_fixed mid1_sclk; /*m_hz*/
struct bw_fixed mid2_sclk; /*m_hz*/
struct bw_fixed mid3_sclk; /*m_hz*/
struct bw_fixed mid4_sclk; /*m_hz*/
struct bw_fixed mid5_sclk; /*m_hz*/
struct bw_fixed mid6_sclk; /*m_hz*/
struct bw_fixed high_sclk; /*m_hz*/
struct bw_fixed low_voltage_max_dispclk; /*m_hz*/
struct bw_fixed mid_voltage_max_dispclk; /*m_hz*/
struct bw_fixed high_voltage_max_dispclk; /*m_hz*/
struct bw_fixed low_voltage_max_phyclk;
struct bw_fixed mid_voltage_max_phyclk;
struct bw_fixed high_voltage_max_phyclk;
struct bw_fixed data_return_bus_width;
struct bw_fixed trc;
struct bw_fixed dmifmc_urgent_latency;
struct bw_fixed stutter_self_refresh_exit_latency;
struct bw_fixed stutter_self_refresh_entry_latency;
struct bw_fixed nbp_state_change_latency;
struct bw_fixed mcifwrmc_urgent_latency;
bool scatter_gather_enable;
struct bw_fixed down_spread_percentage;
Annotation
- Immediate include surface: `bw_fixed.h`.
- Detected declarations: `struct pipe_ctx`, `struct dc`, `struct dc_state`, `struct dce_bw_output`, `struct bw_calcs_dceip`, `struct bw_calcs_vbios`, `struct bw_calcs_data`, `enum bw_calcs_version`, `enum bw_defines`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.