drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/inc/link_hwss.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/inc/link_hwss.h- Extension
.h- Size
- 3588 bytes
- Lines
- 90
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dc_dp_types.hsignal_types.hgrph_object_id.hfixed31_32.h
Detected Declarations
struct dc_linkstruct link_resourcestruct pipe_ctxstruct encoder_set_dp_phy_pattern_paramstruct link_mst_stream_allocation_tablestruct audio_outputstruct link_hwss_extstruct link_hwss
Annotated Snippet
struct link_hwss_ext {
/* function pointers below may require to check for NULL if caller
* considers missing implementation as expected in some cases or none
* critical to be investigated immediately
* *********************************************************************
*/
void (*set_hblank_min_symbol_width)(struct pipe_ctx *pipe_ctx,
const struct dc_link_settings *link_settings,
struct fixed31_32 throttled_vcp_size);
void (*set_throttled_vcp_size)(struct pipe_ctx *pipe_ctx,
struct fixed31_32 throttled_vcp_size);
void (*enable_dp_link_output)(struct dc_link *link,
const struct link_resource *link_res,
enum signal_type signal,
enum clock_source_id clock_source,
const struct dc_link_settings *link_settings);
void (*set_dp_link_test_pattern)(struct dc_link *link,
const struct link_resource *link_res,
struct encoder_set_dp_phy_pattern_param *tp_params);
void (*set_dp_lane_settings)(struct dc_link *link,
const struct link_resource *link_res,
const struct dc_link_settings *link_settings,
const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
void (*update_stream_allocation_table)(struct dc_link *link,
const struct link_resource *link_res,
const struct link_mst_stream_allocation_table *table);
};
struct link_hwss {
struct link_hwss_ext ext;
/* function pointers below MUST be assigned to all types of link_hwss
* *********************************************************************
*/
void (*setup_stream_encoder)(struct pipe_ctx *pipe_ctx);
void (*reset_stream_encoder)(struct pipe_ctx *pipe_ctx);
void (*setup_stream_attribute)(struct pipe_ctx *pipe_ctx);
void (*disable_link_output)(struct dc_link *link,
const struct link_resource *link_res,
enum signal_type signal);
void (*setup_audio_output)(struct pipe_ctx *pipe_ctx,
struct audio_output *audio_output, uint32_t audio_inst);
void (*enable_audio_packet)(struct pipe_ctx *pipe_ctx);
void (*disable_audio_packet)(struct pipe_ctx *pipe_ctx);
};
#endif /* __DC_LINK_HWSS_H__ */
Annotation
- Immediate include surface: `dc_dp_types.h`, `signal_types.h`, `grph_object_id.h`, `fixed31_32.h`.
- Detected declarations: `struct dc_link`, `struct link_resource`, `struct pipe_ctx`, `struct encoder_set_dp_phy_pattern_param`, `struct link_mst_stream_allocation_table`, `struct audio_output`, `struct link_hwss_ext`, `struct link_hwss`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.