drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
Extension
.c
Size
8758 bytes
Lines
287
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (ext_id) {
		case DCN_1_0__CTXID__DC_HPD1_INT:
			return DC_IRQ_SOURCE_HPD1;
		case DCN_1_0__CTXID__DC_HPD2_INT:
			return DC_IRQ_SOURCE_HPD2;
		case DCN_1_0__CTXID__DC_HPD1_RX_INT:
			return DC_IRQ_SOURCE_HPD1RX;
		case DCN_1_0__CTXID__DC_HPD2_RX_INT:
			return DC_IRQ_SOURCE_HPD2RX;
		default:
			return DC_IRQ_SOURCE_INVALID;
		}
		break;

	default:
		return DC_IRQ_SOURCE_INVALID;
	}
}

static struct irq_source_info_funcs hpd_irq_info_funcs  = {
		.set = NULL,
		.ack = hpd0_ack
};

static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {
		.set = NULL,
		.ack = NULL
};

static struct irq_source_info_funcs pflip_irq_info_funcs = {
		.set = NULL,
		.ack = NULL
};

static struct irq_source_info_funcs vupdate_no_lock_irq_info_funcs = {
	.set = NULL,
	.ack = NULL
};

static struct irq_source_info_funcs vblank_irq_info_funcs = {
		.set = NULL,
		.ack = NULL
};

static struct irq_source_info_funcs vline0_irq_info_funcs = {
	.set = NULL,
	.ack = NULL
};

#undef BASE_INNER
#define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg

/* compile time expand base address. */
#define BASE(seg) BASE_INNER(seg)

#define SRI(reg_name, block, id)\
		BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
		mm ## block ## id ## _ ## reg_name


#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\
		.enable_reg = SRI(reg1, block, reg_num),\
		.enable_mask = block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
		.enable_value = {\
				block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK,\
				(uint32_t)~block ## reg_num ## _ ## reg1 ## __ ## mask1 ## _MASK \
		},\
		.ack_reg = SRI(reg2, block, reg_num),\
		.ack_mask = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
		.ack_value = block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \



#define hpd_int_entry(reg_num)\
		[DC_IRQ_SOURCE_HPD1 + reg_num] = {\
				IRQ_REG_ENTRY(HPD, reg_num,\
						DC_HPD_INT_CONTROL, DC_HPD_INT_EN,\
						DC_HPD_INT_CONTROL, DC_HPD_INT_ACK),\
						.status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\
						.funcs = &hpd_irq_info_funcs\
}

#define hpd_rx_int_entry(reg_num)\
		[DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
				IRQ_REG_ENTRY(HPD, reg_num,\
						DC_HPD_INT_CONTROL, DC_HPD_RX_INT_EN,\
						DC_HPD_INT_CONTROL, DC_HPD_RX_INT_ACK),\
						.status_reg = SRI(DC_HPD_INT_STATUS, HPD, reg_num),\
						.funcs = &hpd_rx_irq_info_funcs\
}

Annotation

Implementation Notes