drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.c
Extension
.c
Size
11410 bytes
Lines
354
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "link_hwss_dio.h"
#include "core_types.h"
#include "link_enc_cfg.h"

/**
 * DOC: overview
 *
 * Display Input Output (DIO), is the display input and output unit in DCN. It
 * includes output encoders to support different display output, like
 * DisplayPort, HDMI, DVI interface, and others. It also includes the control
 * and status channels for these interfaces.
 */


void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx,
		struct fixed31_32 throttled_vcp_size)
{
	struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc;

	stream_encoder->funcs->set_throttled_vcp_size(
				stream_encoder,
				throttled_vcp_size);
}

void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx)
{
	struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;
	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;

	if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)
		link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);
	if (!link_enc) {
		ASSERT(link_enc);
		return;
	}

	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
		link_enc->funcs->connect_dig_be_to_fe(link_enc,
				pipe_ctx->stream_res.stream_enc->id, true);
	if (dc_is_dp_signal(pipe_ctx->stream->signal))
		pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(pipe_ctx->stream->link,
				DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_BE);
	if (stream_enc->funcs->enable_stream)
		stream_enc->funcs->enable_stream(stream_enc,
				pipe_ctx->stream->signal, true);
	if (stream_enc->funcs->map_stream_to_link)
		stream_enc->funcs->map_stream_to_link(stream_enc,
				stream_enc->stream_enc_inst, link_enc->transmitter - TRANSMITTER_UNIPHY_A);
	if (stream_enc->funcs->set_input_mode)
		stream_enc->funcs->set_input_mode(stream_enc,
				pipe_ctx->stream_res.pix_clk_params.dio_se_pix_per_cycle);
	if (stream_enc->funcs->enable_fifo)
		stream_enc->funcs->enable_fifo(stream_enc);
}

void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx)
{
	struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;
	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;

	if (!pipe_ctx->stream->ctx->dc->config.unify_link_enc_assignment)
		link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);
	if (!link_enc) {
		ASSERT(link_enc);
		return;
	}

	if (!stream_enc)
		return;

	if (stream_enc->funcs->disable_fifo)
		stream_enc->funcs->disable_fifo(stream_enc);
	if (stream_enc->funcs->set_input_mode)
		stream_enc->funcs->set_input_mode(stream_enc, 0);
	if (stream_enc->funcs->enable_stream)
		stream_enc->funcs->enable_stream(stream_enc,
				pipe_ctx->stream->signal, false);

	if (!dc_is_rgb_signal(pipe_ctx->stream->signal))
		link_enc->funcs->connect_dig_be_to_fe(
				link_enc,
				pipe_ctx->stream_res.stream_enc->id,
				false);

	if (dc_is_dp_signal(pipe_ctx->stream->signal))
		pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(
				pipe_ctx->stream->link,
				DPCD_SOURCE_SEQ_AFTER_DISCONNECT_DIG_FE_BE);

}

Annotation

Implementation Notes