drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_dpia.c- Extension
.c- Size
- 6440 bytes
- Lines
- 185
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
link_hwss_dpia.hcore_types.hlink_hwss_dio.hlink_enc_cfg.h
Detected Declarations
function filesfunction set_dio_dpia_link_test_patternfunction set_dio_dpia_lane_settingsfunction enable_dpia_link_outputfunction disable_dpia_link_outputfunction can_use_dpia_link_hwss
Annotated Snippet
if (link->dc->config.enable_dpia_pre_training || link->dc->config.unify_link_enc_assignment) {
uint8_t fec_rdy = link->dc->link_srv->dp_should_enable_fec(link);
uint8_t digmode = dc_is_dp_sst_signal(signal) ? DIG_SST_MODE : DIG_MST_MODE;
if (link_enc->funcs->enable_dpia_output)
link_enc->funcs->enable_dpia_output(
link_enc,
link_settings,
link->ddc_hw_inst,
digmode,
fec_rdy);
else
DC_LOG_ERROR("%s: link encoder does not support enable_dpia_output\n", __func__);
} else
enable_dio_dp_link_output(link, link_res, signal, clock_source, link_settings);
}
link->dc->link_srv->dp_trace_source_sequence(link,
DPCD_SOURCE_SEQ_AFTER_ENABLE_LINK_PHY);
}
static void disable_dpia_link_output(struct dc_link *link,
const struct link_resource *link_res,
enum signal_type signal)
{
struct link_encoder *link_enc = link_res->dio_link_enc;
DC_LOGGER_INIT(link->ctx->logger);
if (!link->dc->config.unify_link_enc_assignment)
link_enc = link_enc_cfg_get_link_enc(link);
if (link_enc != NULL) {
if (link->dc->config.enable_dpia_pre_training || link->dc->config.unify_link_enc_assignment) {
uint8_t digmode = dc_is_dp_sst_signal(signal) ? DIG_SST_MODE : DIG_MST_MODE;
if (link_enc->funcs->disable_dpia_output)
link_enc->funcs->disable_dpia_output(link_enc, link->ddc_hw_inst, digmode);
else
DC_LOG_ERROR("%s: link encoder does not support disable_dpia_output\n", __func__);
} else
link_enc->funcs->disable_output(link_enc, signal);
}
link->dc->link_srv->dp_trace_source_sequence(link,
DPCD_SOURCE_SEQ_AFTER_DISABLE_LINK_PHY);
}
static const struct link_hwss dpia_link_hwss = {
/* Ensure initialization order matches the declaration in link_hwss.h
* for strict compiler compliance and consistency across HWSS implementations
*/
.ext = {
.set_throttled_vcp_size = set_dio_throttled_vcp_size,
.enable_dp_link_output = enable_dpia_link_output,
.set_dp_link_test_pattern = set_dio_dpia_link_test_pattern,
.set_dp_lane_settings = set_dio_dpia_lane_settings,
.update_stream_allocation_table = update_dpia_stream_allocation_table,
},
.setup_stream_encoder = setup_dio_stream_encoder,
.reset_stream_encoder = reset_dio_stream_encoder,
.setup_stream_attribute = setup_dio_stream_attribute,
.disable_link_output = disable_dpia_link_output,
.setup_audio_output = setup_dio_audio_output,
.enable_audio_packet = enable_dio_audio_packet,
.disable_audio_packet = disable_dio_audio_packet,
};
bool can_use_dpia_link_hwss(const struct dc_link *link,
const struct link_resource *link_res)
{
if (!link->dc->config.unify_link_enc_assignment)
return link->is_dig_mapping_flexible && link->dc->res_pool->funcs->link_encs_assign;
else
return link->is_dig_mapping_flexible && link_res->dio_link_enc != NULL;
}
const struct link_hwss *get_dpia_link_hwss(void)
{
return &dpia_link_hwss;
}
Annotation
- Immediate include surface: `link_hwss_dpia.h`, `core_types.h`, `link_hwss_dio.h`, `link_enc_cfg.h`.
- Detected declarations: `function files`, `function set_dio_dpia_link_test_pattern`, `function set_dio_dpia_lane_settings`, `function enable_dpia_link_output`, `function disable_dpia_link_output`, `function can_use_dpia_link_hwss`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.