drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_panel_replay.c- Extension
.c- Size
- 14868 bytes
- Lines
- 429
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
link_dp_panel_replay.hlink_edp_panel_control.hlink_dpcd.hdm_helpers.hdc/dc_dmub_srv.hdce/dmub_replay.h
Detected Declarations
function filesfunction dp_pr_set_static_screen_paramfunction dp_setup_panel_replayfunction dp_pr_get_panel_instfunction dp_setup_replayfunction dp_pr_enablefunction dp_pr_copy_settingsfunction dp_pr_update_statefunction dp_pr_set_general_cmdfunction dp_pr_get_state
Annotated Snippet
if (dc_is_embedded_signal(link->connector_signal)) {
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_CRC_ENABLE = 1;
pr_config_1.bits.IRQ_HPD_ASSDP_MISSING = 1;
pr_config_1.bits.IRQ_HPD_VSCSDP_UNCORRECTABLE_ERROR = 1;
pr_config_1.bits.IRQ_HPD_RFB_ERROR = 1;
pr_config_1.bits.IRQ_HPD_ACTIVE_FRAME_CRC_ERROR = 1;
pr_config_1.bits.PANEL_REPLAY_SELECTIVE_UPDATE_ENABLE = 1;
pr_config_1.bits.PANEL_REPLAY_EARLY_TRANSPORT_ENABLE = 1;
} else {
pr_config_1.bits.PANEL_REPLAY_ENABLE = 1;
}
pr_config_2.bits.SINK_REFRESH_RATE_UNLOCK_GRANTED = 0;
if (link->dpcd_caps.vesa_replay_caps.bits.SU_Y_GRANULARITY_EXT_CAP_SUPPORTED)
pr_config_2.bits.SU_Y_GRANULARITY_EXT_VALUE_ENABLED = 1;
pr_config_2.bits.SU_REGION_SCAN_LINE_CAPTURE_INDICATION = 0;
dm_helpers_dp_write_dpcd(link->ctx, link,
DP_PANEL_REPLAY_ENABLE_AND_CONFIGURATION_1,
(uint8_t *)&(pr_config_1.raw), sizeof(uint8_t));
dm_helpers_dp_write_dpcd(link->ctx, link,
DP_PANEL_REPLAY_ENABLE_AND_CONFIGURATION_2,
(uint8_t *)&(pr_config_2.raw), sizeof(uint8_t));
//ALPM Setup
memset(&alpm_config, 0, sizeof(alpm_config));
alpm_config.bits.ENABLE = link->replay_settings.config.alpm_mode != DC_ALPM_UNSUPPORTED ? 1 : 0;
if (link->replay_settings.config.alpm_mode == DC_ALPM_AUXLESS) {
alpm_config.bits.ALPM_MODE_SEL = 1;
alpm_config.bits.ACDS_PERIOD_DURATION = 1;
}
dm_helpers_dp_write_dpcd(
link->ctx,
link,
DP_RECEIVER_ALPM_CONFIG,
&alpm_config.raw,
sizeof(alpm_config.raw));
//Enable frame skipping
if (link->replay_settings.config.frame_skip_supported)
data = data | (1 << DP_SINK_ENABLE_FRAME_SKIPPING_MODE_SHIFT);
dm_helpers_dp_write_dpcd(link->ctx, link,
DP_SINK_PR_ENABLE_AND_CONFIGURATION,
(uint8_t *)&(data), sizeof(uint8_t));
}
return true;
}
bool dp_pr_get_panel_inst(const struct dc *dc,
const struct dc_link *link,
unsigned int *inst_out)
{
if (!dc || !link || !inst_out)
return false;
if (dc->config.frame_update_cmd_version2 == false)
return dc_get_edp_link_panel_inst(dc, link, inst_out);
if (!dc_is_dp_sst_signal(link->connector_signal)) /* only supoprt DP sst (eDP included) for now */
return false;
for (unsigned int i = 0; i < MAX_PIPES; i++) {
if (dc->current_state->res_ctx.pipe_ctx[i].stream &&
dc->current_state->res_ctx.pipe_ctx[i].stream->link == link) {
/* *inst_out is equal to otg number */
if (dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg)
*inst_out = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg->inst;
else
*inst_out = 0;
return true;
}
}
return false;
}
bool dp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream)
{
if (!link)
return false;
Annotation
- Immediate include surface: `link_dp_panel_replay.h`, `link_edp_panel_control.h`, `link_dpcd.h`, `dm_helpers.h`, `dc/dc_dmub_srv.h`, `dce/dmub_replay.h`.
- Detected declarations: `function files`, `function dp_pr_set_static_screen_param`, `function dp_setup_panel_replay`, `function dp_pr_get_panel_inst`, `function dp_setup_replay`, `function dp_pr_enable`, `function dp_pr_copy_settings`, `function dp_pr_update_state`, `function dp_pr_set_general_cmd`, `function dp_pr_get_state`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.