drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/link/protocols/link_hdmi_frl.c- Extension
.c- Size
- 40177 bytes
- Lines
- 1188
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
link_hdmi_frl.hlink_ddc.hlink/link_dpms.hlink/link_validation.hresource.hdccg.hdml/dml1_frl_cap_chk.h
Detected Declarations
function filesfunction hdmi_return_preeshoot_and_deemphasisfunction hdmi_frl_test_dsc_max_ratefunction hdmi_frl_find_matching_phypllfunction hdmi_frl_retrieve_link_capfunction hdmi_frl_LTS_clear_Update_flagfunction hdmi_frl_poll_status_flagfunction hdmi_frl_poll_startfunction hdmi_frl_LTS_clear_Link_Settingfunction hdmi_frl_perform_link_trainingfunction hdmi_frl_perform_link_training_with_retriesfunction hdmi_frl_perform_link_training_with_fallbackfunction hdmi_frl_verify_link_capfunction hdmi_frl_set_preferred_link_settingsfunction update_borrow_mode_from_dsc_paddingfunction hdmi_frl_decide_link_settingsfunction hdmi_frl_write_read_request_enable
Annotated Snippet
if (flt_no_timeout) {
hpo_frl_link_enc->funcs->set_hdmi_training_pattern(
hpo_frl_link_enc,
ln0_pattern - 1,
ln1_pattern - 1,
ln2_pattern - 1,
ln3_pattern - 1);
} else
hpo_frl_link_enc->funcs->set_hdmi_training_pattern(
hpo_frl_link_enc,
(ln0_pattern == 0x03) ? 0xF : ln0_pattern - 1,
(ln1_pattern == 0x03) ? 0xF : ln1_pattern - 1,
(ln2_pattern == 0x03) ? 0xF : ln2_pattern - 1,
(ln3_pattern == 0x03) ? 0xF : ln3_pattern - 1);
} else
hpo_frl_link_enc->funcs->set_hdmi_training_pattern(
hpo_frl_link_enc,
ln0_pattern - 1,
ln1_pattern - 1,
ln2_pattern - 1,
ln3_pattern - 1);
if (ln0_pattern == 0x0E || ln1_pattern == 0x0E ||
ln2_pattern == 0x0E || ln3_pattern == 0x0E) {
if (scdc_update.fields.FLT_UPDATE) {
if (link->dc->debug.limit_ffe == 0)
return false;
bool de_emphasis_only = false;
bool pre_shoot_only = false;
bool no_ffe = false;
hdmi_return_preeshoot_and_deemphasis(link, &test_req,
&de_emphasis_only, &pre_shoot_only, &no_ffe);
dio_link_enc->funcs->prog_eq_setting(dio_link_enc, 0xEE,
de_emphasis_only,
pre_shoot_only,
no_ffe,
&link->frl_link_settings);
}
} else
if (!flt_no_timeout) {
hdmi_frl_LTS_clear_Link_Setting(link->ddc);
hdmi_frl_LTS_clear_Update_flag(link->ddc);
hpo_frl_link_enc->funcs->set_hdmi_training_pattern(hpo_frl_link_enc, 0, 0, 0, 0);
hdmi_frl_perform_link_training_with_retries(link);
link_update = true;
}
write_buffer[0] = HDMI_SCDC_UPDATE_0;
/*Clear SCDC Update Flags*/
write_buffer[1] = (scdc_update.fields.FLT_UPDATE << 5);
link_query_ddc_data(link->ddc, slave_address,
write_buffer, sizeof(write_buffer), NULL, 0);
}
if (scdc_update.fields.SOURCE_TEST_UPDATE) {
offset = HDMI_SCDC_SOURCE_TEST_REQ;
bool de_emphasis_only = false;
bool pre_shoot_only = false;
bool no_ffe = false;
link_query_ddc_data(link->ddc, slave_address,
&offset, sizeof(offset), &test_req.byte,
sizeof(test_req.byte));
hdmi_return_preeshoot_and_deemphasis(link, &test_req,
&de_emphasis_only, &pre_shoot_only, &no_ffe);
dio_link_enc->funcs->prog_eq_setting(dio_link_enc, 0xFF,
de_emphasis_only,
pre_shoot_only,
no_ffe,
&link->frl_link_settings);
write_buffer[0] = HDMI_SCDC_UPDATE_0;
/*Clear SCDC Update Flags*/
write_buffer[1] = (scdc_update.fields.SOURCE_TEST_UPDATE << 3);
link_query_ddc_data(link->ddc, slave_address,
write_buffer, sizeof(write_buffer), NULL, 0);
}
return link_update;
}
void hdmi_frl_poll_start(struct ddc_service *ddc_service)
{
uint8_t slave_address = HDMI_SCDC_ADDRESS;
uint8_t offset = HDMI_SCDC_UPDATE_0;
Annotation
- Immediate include surface: `link_hdmi_frl.h`, `link_ddc.h`, `link/link_dpms.h`, `link/link_validation.h`, `resource.h`, `dccg.h`, `dml/dml1_frl_cap_chk.h`.
- Detected declarations: `function files`, `function hdmi_return_preeshoot_and_deemphasis`, `function hdmi_frl_test_dsc_max_rate`, `function hdmi_frl_find_matching_phypll`, `function hdmi_frl_retrieve_link_cap`, `function hdmi_frl_LTS_clear_Update_flag`, `function hdmi_frl_poll_status_flag`, `function hdmi_frl_poll_start`, `function hdmi_frl_LTS_clear_Link_Setting`, `function hdmi_frl_perform_link_training`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.