drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.c- Extension
.c- Size
- 18904 bytes
- Lines
- 609
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn20_mpc.hreg_helper.hdc.hmem_input.hdcn10/dcn10_cm_common.h
Detected Declarations
function filesfunction mpc2_set_denormfunction mpc2_set_denorm_clampfunction mpc2_set_output_cscfunction mpc2_set_ocsc_defaultfunction mpc2_ogam_get_reg_fieldfunction mpc20_power_on_ogam_lutfunction mpc20_configure_ogam_lutfunction mpc20_get_ogam_currentfunction mpc2_program_lutbfunction mpc2_program_lutafunction mpc20_program_ogam_pwlfunction apply_DEDCN20_305_wafunction mpc2_set_output_gammafunction mpc2_assert_idle_mpccfunction mpc2_assert_mpcc_idle_before_connectfunction mpc2_init_mpccfunction mpc2_read_mpcc_statefunction dcn20_mpc_construct
Annotated Snippet
#include "dcn20_mpc.h"
#include "reg_helper.h"
#include "dc.h"
#include "mem_input.h"
#include "dcn10/dcn10_cm_common.h"
#define REG(reg)\
mpc20->mpc_regs->reg
#define IND_REG(index) \
(index)
#define CTX \
mpc20->base.ctx
#undef FN
#define FN(reg_name, field_name) \
mpc20->mpc_shift->field_name, mpc20->mpc_mask->field_name
void mpc2_update_blending(
struct mpc *mpc,
struct mpcc_blnd_cfg *blnd_cfg,
int mpcc_id)
{
struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id);
REG_UPDATE_7(MPCC_CONTROL[mpcc_id],
MPCC_ALPHA_BLND_MODE, blnd_cfg->alpha_mode,
MPCC_ALPHA_MULTIPLIED_MODE, blnd_cfg->pre_multiplied_alpha,
MPCC_BLND_ACTIVE_OVERLAP_ONLY, blnd_cfg->overlap_only,
MPCC_GLOBAL_ALPHA, blnd_cfg->global_alpha,
MPCC_GLOBAL_GAIN, blnd_cfg->global_gain,
MPCC_BG_BPC, blnd_cfg->background_color_bpc,
MPCC_BOT_GAIN_MODE, blnd_cfg->bottom_gain_mode);
REG_SET(MPCC_TOP_GAIN[mpcc_id], 0, MPCC_TOP_GAIN, blnd_cfg->top_gain);
REG_SET(MPCC_BOT_GAIN_INSIDE[mpcc_id], 0, MPCC_BOT_GAIN_INSIDE, blnd_cfg->bottom_inside_gain);
REG_SET(MPCC_BOT_GAIN_OUTSIDE[mpcc_id], 0, MPCC_BOT_GAIN_OUTSIDE, blnd_cfg->bottom_outside_gain);
mpcc->blnd_cfg = *blnd_cfg;
}
void mpc2_set_denorm(
struct mpc *mpc,
int opp_id,
enum dc_color_depth output_depth)
{
struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
int denorm_mode = 0;
switch (output_depth) {
case COLOR_DEPTH_666:
denorm_mode = 1;
break;
case COLOR_DEPTH_888:
denorm_mode = 2;
break;
case COLOR_DEPTH_999:
denorm_mode = 3;
break;
case COLOR_DEPTH_101010:
denorm_mode = 4;
break;
case COLOR_DEPTH_111111:
denorm_mode = 5;
break;
case COLOR_DEPTH_121212:
denorm_mode = 6;
break;
case COLOR_DEPTH_141414:
case COLOR_DEPTH_161616:
default:
/* not valid used case! */
break;
}
REG_UPDATE(DENORM_CONTROL[opp_id],
MPC_OUT_DENORM_MODE, denorm_mode);
}
void mpc2_set_denorm_clamp(
struct mpc *mpc,
int opp_id,
struct mpc_denorm_clamp denorm_clamp)
{
struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
Annotation
- Immediate include surface: `dcn20_mpc.h`, `reg_helper.h`, `dc.h`, `mem_input.h`, `dcn10/dcn10_cm_common.h`.
- Detected declarations: `function files`, `function mpc2_set_denorm`, `function mpc2_set_denorm_clamp`, `function mpc2_set_output_csc`, `function mpc2_set_ocsc_default`, `function mpc2_ogam_get_reg_field`, `function mpc20_power_on_ogam_lut`, `function mpc20_configure_ogam_lut`, `function mpc20_get_ogam_current`, `function mpc2_program_lutb`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.