drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/mpc/dcn20/dcn20_mpc.h- Extension
.h- Size
- 13105 bytes
- Lines
- 313
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn10/dcn10_mpc.h
Detected Declarations
struct dcn20_mpc_registersstruct dcn20_mpc_shiftstruct dcn20_mpc_maskstruct dcn20_mpc
Annotated Snippet
struct dcn20_mpc_registers {
MPC_REG_VARIABLE_LIST_DCN2_0
};
struct dcn20_mpc_shift {
MPC_REG_FIELD_LIST_DCN2_0(uint8_t)
};
struct dcn20_mpc_mask {
MPC_REG_FIELD_LIST_DCN2_0(uint32_t)
};
struct dcn20_mpc {
struct mpc base;
int mpcc_in_use_mask;
int num_mpcc;
const struct dcn20_mpc_registers *mpc_regs;
const struct dcn20_mpc_shift *mpc_shift;
const struct dcn20_mpc_mask *mpc_mask;
};
void dcn20_mpc_construct(struct dcn20_mpc *mpcc20,
struct dc_context *ctx,
const struct dcn20_mpc_registers *mpc_regs,
const struct dcn20_mpc_shift *mpc_shift,
const struct dcn20_mpc_mask *mpc_mask,
int num_mpcc);
void mpc2_update_blending(
struct mpc *mpc,
struct mpcc_blnd_cfg *blnd_cfg,
int mpcc_id);
void mpc2_set_denorm(
struct mpc *mpc,
int opp_id,
enum dc_color_depth output_depth);
void mpc2_set_denorm_clamp(
struct mpc *mpc,
int opp_id,
struct mpc_denorm_clamp denorm_clamp);
void mpc2_set_output_csc(
struct mpc *mpc,
int opp_id,
const uint16_t *regval,
enum mpc_output_csc_mode ocsc_mode);
void mpc2_set_ocsc_default(
struct mpc *mpc,
int opp_id,
enum dc_color_space color_space,
enum mpc_output_csc_mode ocsc_mode);
void mpc2_set_output_gamma(
struct mpc *mpc,
int mpcc_id,
const struct pwl_params *params);
void mpc2_assert_idle_mpcc(struct mpc *mpc, int id);
void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
#endif
Annotation
- Immediate include surface: `dcn10/dcn10_mpc.h`.
- Detected declarations: `struct dcn20_mpc_registers`, `struct dcn20_mpc_shift`, `struct dcn20_mpc_mask`, `struct dcn20_mpc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.