drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h- Extension
.h- Size
- 12203 bytes
- Lines
- 266
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn30/dcn30_mpc.hdcn32/dcn32_mpc.h
Detected Declarations
struct dcn401_mpc_shiftstruct dcn401_mpc_maskstruct dcn401_mpc_registersstruct dcn401_mpc
Annotated Snippet
struct dcn401_mpc_shift {
MPC_REG_FIELD_LIST_DCN4_01(uint8_t);
};
struct dcn401_mpc_mask {
MPC_REG_FIELD_LIST_DCN4_01(uint32_t);
};
struct dcn401_mpc_registers {
MPC_REG_VARIABLE_LIST_DCN4_01
uint32_t MPCC_CONTROL2[MAX_MPCC];
};
struct dcn401_mpc {
struct mpc base;
int mpcc_in_use_mask;
int num_mpcc;
const struct dcn401_mpc_registers *mpc_regs;
const struct dcn401_mpc_shift *mpc_shift;
const struct dcn401_mpc_mask *mpc_mask;
int num_rmu;
};
void dcn401_mpc_construct(struct dcn401_mpc *mpc401,
struct dc_context *ctx,
const struct dcn401_mpc_registers *mpc_regs,
const struct dcn401_mpc_shift *mpc_shift,
const struct dcn401_mpc_mask *mpc_mask,
int num_mpcc,
int num_rmu);
void mpc401_set_movable_cm_location(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id);
void mpc401_populate_lut(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params,
bool lut_bank_a, int mpcc_id);
void mpc401_program_lut_mode(
struct mpc *mpc,
const enum MCM_LUT_ID id,
const enum MCM_LUT_XABLE xable,
bool lut_bank_a,
int mpcc_id);
void mpc401_program_lut_read_write_control(
struct mpc *mpc,
const enum MCM_LUT_ID id,
bool lut_bank_a,
int mpcc_id);
void mpc401_set_gamut_remap(
struct mpc *mpc,
int mpcc_id,
const struct mpc_grph_gamut_adjustment *adjust);
void mpc401_get_gamut_remap(
struct mpc *mpc,
int mpcc_id,
struct mpc_grph_gamut_adjustment *adjust);
void mpc401_update_3dlut_fast_load_select(
struct mpc *mpc,
int mpcc_id,
int hubp_idx);
void mpc_program_gamut_remap(
struct mpc *mpc,
unsigned int mpcc_id,
const uint16_t *regval,
enum mpcc_gamut_remap_id gamut_remap_block_id,
enum mpcc_gamut_remap_mode_select mode_select);
void mpc_read_gamut_remap(struct mpc *mpc,
int mpcc_id,
uint16_t *regval,
enum mpcc_gamut_remap_id gamut_remap_block_id,
uint32_t *mode_select);
void mpc401_get_3dlut_fast_load_status(
struct mpc *mpc,
int mpcc_id,
uint32_t *done,
uint32_t *soft_underflow,
uint32_t *hard_underflow);
void mpc401_update_3dlut_fast_load_select(
struct mpc *mpc,
int mpcc_id,
int hubp_idx);
#endif
Annotation
- Immediate include surface: `dcn30/dcn30_mpc.h`, `dcn32/dcn32_mpc.h`.
- Detected declarations: `struct dcn401_mpc_shift`, `struct dcn401_mpc_mask`, `struct dcn401_mpc_registers`, `struct dcn401_mpc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.