drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/mpc/dcn42/dcn42_mpc.h- Extension
.h- Size
- 62400 bytes
- Lines
- 1008
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn401/dcn401_mpc.h
Detected Declarations
struct dcn42_mpc_shiftstruct dcn42_mpc_maskstruct dcn42_mpc_registersstruct dcn42_mpc
Annotated Snippet
struct dcn42_mpc_shift {
MPC_REG_FIELD_LIST_DCN42(uint8_t);
};
struct dcn42_mpc_mask {
MPC_REG_FIELD_LIST_DCN42(uint32_t);
};
struct dcn42_mpc_registers {
MPC_REG_VARIABLE_LIST_DCN42;
};
struct dcn42_mpc {
struct mpc base;
int mpcc_in_use_mask;
int num_mpcc;
const struct dcn42_mpc_registers *mpc_regs;
const struct dcn42_mpc_shift *mpc_shift;
const struct dcn42_mpc_mask *mpc_mask;
int num_rmu;
};
void dcn42_mpc_construct(struct dcn42_mpc *mpc401,
struct dc_context *ctx,
const struct dcn42_mpc_registers *mpc_regs,
const struct dcn42_mpc_shift *mpc_shift,
const struct dcn42_mpc_mask *mpc_mask,
int num_mpcc,
int num_rmu);
void mpc42_init_mpcc(struct mpcc *mpcc, int mpcc_inst);
void mpc42_program_shaper_lutb_settings(
struct mpc *mpc,
const struct pwl_params *params,
uint32_t mpcc_id);
void mpc42_program_shaper_luta_settings(
struct mpc *mpc,
const struct pwl_params *params,
uint32_t mpcc_id);
void mpc42_configure_shaper_lut(
struct mpc *mpc,
bool is_ram_a,
uint32_t mpcc_id);
void mpc42_power_on_shaper_3dlut(
struct mpc *mpc,
uint32_t mpcc_id,
bool power_on);
void mpc42_program_3dlut_size(
struct mpc *mpc,
uint32_t width,
int mpcc_id);
void mpc42_program_3dlut_fl_bias_scale(
struct mpc *mpc,
uint16_t bias,
uint16_t scale,
int mpcc_id);
void mpc42_program_bit_depth(
struct mpc *mpc,
uint16_t bit_depth,
int mpcc_id);
void mpc42_populate_lut(
struct mpc *mpc,
const union mcm_lut_params params,
bool lut_bank_a,
int mpcc_id);
void mpc42_program_lut_read_write_control(
struct mpc *mpc,
const enum MCM_LUT_ID id,
bool lut_bank_a,
bool enabled,
int mpcc_id);
bool mpc42_is_config_supported(uint32_t width);
/* RMCM */
void mpc42_program_rmcm_shaper_lut(
struct mpc *mpc,
const struct pwl_result_data *rgb,
uint32_t num,
uint32_t mpcc_id);
void mpc42_program_rmcm_shaper_lutb_settings(
struct mpc *mpc,
const struct pwl_params *params,
uint32_t mpcc_id);
void mpc42_program_rmcm_shaper_luta_settings(
struct mpc *mpc,
const struct pwl_params *params,
uint32_t mpcc_id);
void mpc42_configure_rmcm_shaper_lut(
Annotation
- Immediate include surface: `dcn401/dcn401_mpc.h`.
- Detected declarations: `struct dcn42_mpc_shift`, `struct dcn42_mpc_mask`, `struct dcn42_mpc_registers`, `struct dcn42_mpc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.