drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/opp/dcn20/dcn20_opp.h- Extension
.h- Size
- 5943 bytes
- Lines
- 179
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn10/dcn10_opp.h
Detected Declarations
struct dcn20_opp_registersstruct dcn20_opp_shiftstruct dcn20_opp_maskstruct dcn20_opp
Annotated Snippet
struct dcn20_opp_registers {
OPP_REG_VARIABLE_LIST_DCN2_0;
};
struct dcn20_opp_shift {
OPP_DCN20_REG_FIELD_LIST(uint8_t);
};
struct dcn20_opp_mask {
OPP_DCN20_REG_FIELD_LIST(uint32_t);
};
struct dcn20_opp {
struct output_pixel_processor base;
const struct dcn20_opp_registers *regs;
const struct dcn20_opp_shift *opp_shift;
const struct dcn20_opp_mask *opp_mask;
bool is_write_to_ram_a_safe;
};
void dcn20_opp_construct(struct dcn20_opp *oppn20,
struct dc_context *ctx,
uint32_t inst,
const struct dcn20_opp_registers *regs,
const struct dcn20_opp_shift *opp_shift,
const struct dcn20_opp_mask *opp_mask);
void opp2_set_disp_pattern_generator(
struct output_pixel_processor *opp,
enum controller_dp_test_pattern test_pattern,
enum controller_dp_color_space color_space,
enum dc_color_depth color_depth,
const struct tg_color *solid_color,
int width,
int height,
int offset);
void opp2_program_dpg_dimensions(
struct output_pixel_processor *opp,
uint32_t width, uint32_t height);
bool opp2_dpg_is_blanked(struct output_pixel_processor *opp);
bool opp2_dpg_is_pending(struct output_pixel_processor *opp);
void opp2_dpg_set_blank_color(
struct output_pixel_processor *opp,
const struct tg_color *color);
void opp2_program_left_edge_extra_pixel (
struct output_pixel_processor *opp,
enum dc_pixel_encoding pixel_encoding, bool is_primary);
uint32_t opp2_get_left_edge_extra_pixel_count(struct output_pixel_processor *opp,
enum dc_pixel_encoding pixel_encoding, bool is_primary);
void opp2_read_reg_state(struct output_pixel_processor *opp, struct dcn_opp_reg_state *opp_reg_state);
#endif
Annotation
- Immediate include surface: `dcn10/dcn10_opp.h`.
- Detected declarations: `struct dcn20_opp_registers`, `struct dcn20_opp_shift`, `struct dcn20_opp_mask`, `struct dcn20_opp`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.