drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/display/dc/optc/dcn301/dcn301_optc.h

Extension

.h

Size

1519 bytes

Lines

37

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• dcn20/dcn20_optc.h
• dcn30/dcn30_optc.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __DC_OPTC_DCN301_H__
#define __DC_OPTC_DCN301_H__

#include "dcn20/dcn20_optc.h"
#include "dcn30/dcn30_optc.h"

void dcn301_timing_generator_init(struct optc *optc1);
void optc301_setup_manual_trigger(struct timing_generator *optc);
void optc301_set_drr(struct timing_generator *optc, const struct drr_params *params);

#endif /* __DC_OPTC_DCN301_H__ */

Annotation

• Immediate include surface: `dcn20/dcn20_optc.h`, `dcn30/dcn30_optc.h`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.