drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/optc/dcn42/dcn42_optc.c
Extension
.c
Size
10167 bytes
Lines
290
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
//
// Copyright 2026 Advanced Micro Devices, Inc.

#include "dcn42_optc.h"
#include "dcn30/dcn30_optc.h"
#include "dcn31/dcn31_optc.h"
#include "dcn32/dcn32_optc.h"
#include "dcn35/dcn35_optc.h"
#include "dcn401/dcn401_optc.h"
#include "reg_helper.h"
#include "dc.h"
#include "dcn_calc_math.h"
#include "dc_dmub_srv.h"
#include "dc_trace.h"

#define REG(reg)\
	optc1->tg_regs->reg

#define CTX \
	optc1->base.ctx

#undef FN
#define FN(reg_name, field_name) \
	optc1->tg_shift->field_name, optc1->tg_mask->field_name

/*
 * optc42_get_crc - Capture CRC result per component
 *
 * @optc: timing_generator instance.
 * @r_cr: 16-bit primary CRC signature for red data.
 * @g_y: 16-bit primary CRC signature for green data.
 * @b_cb: 16-bit primary CRC signature for blue data.
 *
 * This function reads the CRC signature from the OPTC registers. Notice that
 * we have three registers to keep the CRC result per color component (RGB).
 *
 * Returns:
 * If CRC is disabled, return false; otherwise, return true, and the CRC
 * results in the parameters.
 */

static bool optc42_get_crc(struct timing_generator *optc, uint8_t idx,
		   uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb)
{
	uint32_t field = 0;
	struct optc *optc1 = DCN10TG_FROM_TG(optc);

	REG_GET(OTG_CRC_CNTL, OTG_CRC_EN, &field);

	/* Early return if CRC is not enabled for this CRTC */
	if (!field)
		return false;


	switch (idx) {
	case 0:
		/* OTG_CRC0_DATA_RG has the CRC16 results for the red component */
		REG_GET(OTG_CRC0_DATA_R,
			CRC0_R_CR, r_cr);

		/* OTG_CRC0_DATA_RG has the CRC16 results for the green component */
		REG_GET(OTG_CRC0_DATA_G,
			CRC0_G_Y, g_y);

		/* OTG_CRC0_DATA_B has the CRC16 results for the blue component */
		REG_GET(OTG_CRC0_DATA_B,
			CRC0_B_CB, b_cb);
		break;
	case 1:
		/* OTG_CRC1_DATA_RG has the CRC16 results for the red component */
		REG_GET(OTG_CRC1_DATA_R,
			CRC0_R_CR, r_cr);

		/* OTG_CRC1_DATA_RG has the CRC16 results for the green component */
		REG_GET(OTG_CRC1_DATA_G,
			CRC0_G_Y, g_y);

		/* OTG_CRC1_DATA_B has the CRC16 results for the blue component */
		REG_GET(OTG_CRC1_DATA_B,
			CRC0_B_CB, b_cb);
		break;
	default:
		return false;
	}
	return true;
}

void optc42_enable_pwa(struct timing_generator *optc, struct otc_pwa_frame_sync *pwa_sync_param)
{

Annotation

Implementation Notes