drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c- Extension
.c- Size
- 34150 bytes
- Lines
- 1311
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dm_services.hstream_encoder.hresource.hinclude/irq_service_interface.hdce120_resource.hdce112/dce112_resource.hdce110/dce110_resource.hdio/virtual/virtual_stream_encoder.hdce120/dce120_timing_generator.hirq/dce120/irq_service_dce120.hdce/dce_opp.hdce/dce_clock_source.hdce/dce_ipp.hdce/dce_mem_input.hdce/dce_panel_cntl.hdce110/dce110_hwseq.hdce120/dce120_hwseq.hdce/dce_transform.hclk_mgr.hdce/dce_audio.hdce/dce_link_encoder.hdce/dce_stream_encoder.hdce/dce_hwseq.hdce/dce_abm.hdce/dce_dmcu.hdce/dce_aux.hdce/dce_i2c.hdce/dce_12_0_offset.hdce/dce_12_0_sh_mask.hsoc15_hw_ip.hvega10_ip_offset.hnbio/nbio_6_1_offset.h
Detected Declarations
enum dce120_clk_src_array_idfunction map_transmitter_id_to_phy_instancefunction dce120_clock_source_destroyfunction dce120_hw_sequencer_createfunction dce120_transform_destroyfunction dce120_resource_destructfunction read_dce_strapsfunction dce120_destroy_resource_poolfunction bw_calcs_data_update_from_pplibfunction read_pipe_fusesfunction dce120_resource_construct
Annotated Snippet
if (pool->base.mis[i] != NULL) {
kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));
pool->base.mis[i] = NULL;
}
if (pool->base.irqs != NULL) {
dal_irq_service_destroy(&pool->base.irqs);
}
if (pool->base.timing_generators[i] != NULL) {
kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));
pool->base.timing_generators[i] = NULL;
}
}
for (i = 0; i < (unsigned int)pool->base.res_cap->num_ddc; i++) {
if (pool->base.engines[i] != NULL)
dce110_engine_destroy(&pool->base.engines[i]);
if (pool->base.hw_i2cs[i] != NULL) {
kfree(pool->base.hw_i2cs[i]);
pool->base.hw_i2cs[i] = NULL;
}
if (pool->base.sw_i2cs[i] != NULL) {
kfree(pool->base.sw_i2cs[i]);
pool->base.sw_i2cs[i] = NULL;
}
}
for (i = 0; i < pool->base.audio_count; i++) {
if (pool->base.audios[i])
dce_aud_destroy(&pool->base.audios[i]);
}
for (i = 0; i < pool->base.stream_enc_count; i++) {
if (pool->base.stream_enc[i] != NULL)
kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));
}
for (i = 0; i < pool->base.clk_src_count; i++) {
if (pool->base.clock_sources[i] != NULL)
dce120_clock_source_destroy(
&pool->base.clock_sources[i]);
}
if (pool->base.dp_clock_source != NULL)
dce120_clock_source_destroy(&pool->base.dp_clock_source);
if (pool->base.abm != NULL)
dce_abm_destroy(&pool->base.abm);
if (pool->base.dmcu != NULL)
dce_dmcu_destroy(&pool->base.dmcu);
if (pool->base.oem_device != NULL) {
struct dc *dc = pool->base.oem_device->ctx->dc;
dc->link_srv->destroy_ddc_service(&pool->base.oem_device);
}
}
static void read_dce_straps(
struct dc_context *ctx,
struct resource_straps *straps)
{
uint32_t reg_val = dm_read_reg_soc15(ctx, mmCC_DC_MISC_STRAPS, 0);
straps->audio_stream_number = get_reg_field_value(reg_val,
CC_DC_MISC_STRAPS,
AUDIO_STREAM_NUMBER);
straps->hdmi_disable = get_reg_field_value(reg_val,
CC_DC_MISC_STRAPS,
HDMI_DISABLE);
reg_val = dm_read_reg_soc15(ctx, mmDC_PINSTRAPS, 0);
straps->dc_pinstraps_audio = get_reg_field_value(reg_val,
DC_PINSTRAPS,
DC_PINSTRAPS_AUDIO);
}
static struct audio *create_audio(
struct dc_context *ctx, unsigned int inst)
{
return dce_audio_create(ctx, inst,
&audio_regs[inst], &audio_shift, &audio_mask);
}
static const struct encoder_feature_support link_enc_feature = {
.max_hdmi_deep_color = COLOR_DEPTH_121212,
.max_hdmi_pixel_clock = 600000,
.hdmi_ycbcr420_supported = true,
Annotation
- Immediate include surface: `dm_services.h`, `stream_encoder.h`, `resource.h`, `include/irq_service_interface.h`, `dce120_resource.h`, `dce112/dce112_resource.h`, `dce110/dce110_resource.h`, `dio/virtual/virtual_stream_encoder.h`.
- Detected declarations: `enum dce120_clk_src_array_id`, `function map_transmitter_id_to_phy_instance`, `function dce120_clock_source_destroy`, `function dce120_hw_sequencer_create`, `function dce120_transform_destroy`, `function dce120_resource_destruct`, `function read_dce_straps`, `function dce120_destroy_resource_pool`, `function bw_calcs_data_update_from_pplib`, `function read_pipe_fuses`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.