drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
Extension
.c
Size
43866 bytes
Lines
1746
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (ctx->asic_id.pci_revision_id) {
			case PRID_POLLOCK_94:
			case PRID_POLLOCK_95:
			case PRID_POLLOCK_E9:
			case PRID_POLLOCK_EA:
			case PRID_POLLOCK_EB:
				hws->wa.wait_hubpret_read_start_during_mpo_transition = true;
				break;
			default:
				hws->wa.wait_hubpret_read_start_during_mpo_transition = false;
				break;
			}
	}
	return hws;
}

static const struct resource_create_funcs res_create_funcs = {
	.read_dce_straps = read_dce_straps,
	.create_audio = create_audio,
	.create_stream_encoder = dcn10_stream_encoder_create,
	.create_hwseq = dcn10_hwseq_create,
};

static void dcn10_clock_source_destroy(struct clock_source **clk_src)
{
	kfree(TO_DCE110_CLK_SRC(*clk_src));
	*clk_src = NULL;
}

static struct pp_smu_funcs *dcn10_pp_smu_create(struct dc_context *ctx)
{
	struct pp_smu_funcs *pp_smu = kzalloc_obj(*pp_smu);

	if (!pp_smu)
		return pp_smu;

	dm_pp_get_funcs(ctx, pp_smu);
	return pp_smu;
}

static void dcn10_resource_destruct(struct dcn10_resource_pool *pool)
{
	unsigned int i;

	for (i = 0; i < pool->base.stream_enc_count; i++) {
		if (pool->base.stream_enc[i] != NULL) {
			kfree(DCN10STRENC_FROM_STRENC(pool->base.stream_enc[i]));
			pool->base.stream_enc[i] = NULL;
		}
	}

	if (pool->base.mpc != NULL) {
		kfree(TO_DCN10_MPC(pool->base.mpc));
		pool->base.mpc = NULL;
	}

	kfree(pool->base.hubbub);
	pool->base.hubbub = NULL;

	if (pool->base.dio != NULL) {
		kfree(TO_DCN10_DIO(pool->base.dio));
		pool->base.dio = NULL;
	}

	for (i = 0; i < pool->base.pipe_count; i++) {
		if (pool->base.opps[i] != NULL)
			pool->base.opps[i]->funcs->opp_destroy(&pool->base.opps[i]);

		if (pool->base.dpps[i] != NULL)
			dcn10_dpp_destroy(&pool->base.dpps[i]);

		if (pool->base.ipps[i] != NULL)
			pool->base.ipps[i]->funcs->ipp_destroy(&pool->base.ipps[i]);

		if (pool->base.hubps[i] != NULL) {
			kfree(TO_DCN10_HUBP(pool->base.hubps[i]));
			pool->base.hubps[i] = NULL;
		}

		if (pool->base.irqs != NULL) {
			dal_irq_service_destroy(&pool->base.irqs);
		}

		if (pool->base.timing_generators[i] != NULL)	{
			kfree(DCN10TG_FROM_TG(pool->base.timing_generators[i]));
			pool->base.timing_generators[i] = NULL;
		}
	}

	for (i = 0; i < (unsigned int)pool->base.res_cap->num_ddc; i++) {

Annotation

Implementation Notes