drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c- Extension
.c- Size
- 25820 bytes
- Lines
- 784
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dcn32/dcn32_resource.hdcn20/dcn20_resource.hdml/dcn32/display_mode_vba_util_32.hdml/dcn32/dcn32_fpu.hdc_state_priv.hdc_stream_priv.h
Detected Declarations
function filesfunction dcn32_helper_calculate_mall_bytes_for_cursorfunction dcn32_helper_calculate_num_ways_for_subvpfunction dcn32_merge_pipes_for_subvpfunction dcn32_all_pipes_have_stream_and_planefunction dcn32_subvp_in_usefunction dcn32_mpo_in_usefunction dcn32_any_surfaces_rotatedfunction dcn32_is_center_timingfunction dcn32_is_psr_capablefunction override_det_for_subvpfunction dcn32_determine_det_overridefunction dcn32_set_det_allocationsfunction get_frame_rate_at_max_stretch_100hzfunction is_refresh_rate_support_mclk_switch_using_fw_based_vblank_stretchfunction get_refresh_ratefunction dcn32_can_support_mclk_switch_using_fw_based_vblank_stretchfunction dcn32_check_native_scaling_for_resfunction disallow_subvp_in_active_plus_blankfunction dcn32_subvp_drr_admissablefunction dcn32_subvp_vblank_admissablefunction dcn32_update_dml_pipes_odm_policy_based_on_contextfunction dcn32_override_min_req_dcfclk
Annotated Snippet
if (dc->debug.force_subvp_num_ways) {
return dc->debug.force_subvp_num_ways;
} else if (dc->res_pool->funcs->calculate_mall_ways_from_bytes) {
return dc->res_pool->funcs->calculate_mall_ways_from_bytes(dc, context->bw_ctx.bw.dcn.mall_subvp_size_bytes);
} else {
return 0;
}
} else {
return 0;
}
}
void dcn32_merge_pipes_for_subvp(struct dc *dc,
struct dc_state *context)
{
uint32_t i;
/* merge pipes if necessary */
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
// For now merge all pipes for SubVP since pipe split case isn't supported yet
/* if ODM merge we ignore mpc tree, mpo pipes will have their own flags */
if (pipe->prev_odm_pipe) {
/*split off odm pipe*/
pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe;
if (pipe->next_odm_pipe)
pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe;
pipe->bottom_pipe = NULL;
pipe->next_odm_pipe = NULL;
pipe->plane_state = NULL;
pipe->stream = NULL;
pipe->top_pipe = NULL;
pipe->prev_odm_pipe = NULL;
if (pipe->stream_res.dsc)
dcn20_release_dsc(&context->res_ctx, dc->res_pool, &pipe->stream_res.dsc);
memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));
memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));
} else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) {
struct pipe_ctx *top_pipe = pipe->top_pipe;
struct pipe_ctx *bottom_pipe = pipe->bottom_pipe;
top_pipe->bottom_pipe = bottom_pipe;
if (bottom_pipe)
bottom_pipe->top_pipe = top_pipe;
pipe->top_pipe = NULL;
pipe->bottom_pipe = NULL;
pipe->plane_state = NULL;
pipe->stream = NULL;
memset(&pipe->plane_res, 0, sizeof(pipe->plane_res));
memset(&pipe->stream_res, 0, sizeof(pipe->stream_res));
}
}
}
bool dcn32_all_pipes_have_stream_and_plane(struct dc *dc,
struct dc_state *context)
{
uint32_t i;
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
if (!pipe->stream)
continue;
if (!pipe->plane_state)
return false;
}
return true;
}
bool dcn32_subvp_in_use(struct dc *dc,
struct dc_state *context)
{
uint32_t i;
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
if (dc_state_get_pipe_subvp_type(context, pipe) != SUBVP_NONE)
return true;
}
return false;
}
bool dcn32_mpo_in_use(struct dc_state *context)
Annotation
- Immediate include surface: `dcn32/dcn32_resource.h`, `dcn20/dcn20_resource.h`, `dml/dcn32/display_mode_vba_util_32.h`, `dml/dcn32/dcn32_fpu.h`, `dc_state_priv.h`, `dc_stream_priv.h`.
- Detected declarations: `function files`, `function dcn32_helper_calculate_mall_bytes_for_cursor`, `function dcn32_helper_calculate_num_ways_for_subvp`, `function dcn32_merge_pipes_for_subvp`, `function dcn32_all_pipes_have_stream_and_plane`, `function dcn32_subvp_in_use`, `function dcn32_mpo_in_use`, `function dcn32_any_surfaces_rotated`, `function dcn32_is_center_timing`, `function dcn32_is_psr_capable`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.