drivers/gpu/drm/amd/display/dc/sspl/dc_spl_scl_filters.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_scl_filters.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/sspl/dc_spl_scl_filters.c- Extension
.c- Size
- 48603 bytes
- Lines
- 1235
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
spl_debug.hdc_spl_scl_filters.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: MIT
//
// Copyright 2024 Advanced Micro Devices, Inc.
#include "spl_debug.h"
#include "dc_spl_scl_filters.h"
//=========================================
// <num_taps> = 2
// <num_phases> = 64
// <scale_ratio> = 0.833333 (input/output)
// <sharpness> = 0
// <CoefType> = ModifiedLanczos
// <CoefQuant> = s1.10
// <CoefOut> = s1.12
//=========================================
static const uint16_t filter_2tap_64p[66] = {
0x1000, 0x0000,
0x1000, 0x0000,
0x0FFC, 0x0004,
0x0FF8, 0x0008,
0x0FF0, 0x0010,
0x0FE4, 0x001C,
0x0FD8, 0x0028,
0x0FC4, 0x003C,
0x0FB0, 0x0050,
0x0F98, 0x0068,
0x0F7C, 0x0084,
0x0F58, 0x00A8,
0x0F34, 0x00CC,
0x0F08, 0x00F8,
0x0ED8, 0x0128,
0x0EA4, 0x015C,
0x0E68, 0x0198,
0x0E28, 0x01D8,
0x0DE4, 0x021C,
0x0D98, 0x0268,
0x0D44, 0x02BC,
0x0CEC, 0x0314,
0x0C90, 0x0370,
0x0C2C, 0x03D4,
0x0BC4, 0x043C,
0x0B58, 0x04A8,
0x0AE8, 0x0518,
0x0A74, 0x058C,
0x09FC, 0x0604,
0x0980, 0x0680,
0x0900, 0x0700,
0x0880, 0x0780,
0x0800, 0x0800
};
//=========================================
// <num_taps> = 3
// <num_phases> = 64
// <scale_ratio> = 0.83333 (input/output)
// <sharpness> = 0
// <CoefType> = ModifiedLanczos
// <CoefQuant> = 1.10
// <CoefOut> = 1.12
//=========================================
static const uint16_t filter_3tap_64p_upscale[99] = {
0x0804, 0x07FC, 0x0000,
0x07A8, 0x0860, 0x3FF8,
0x0754, 0x08BC, 0x3FF0,
0x0700, 0x0918, 0x3FE8,
0x06AC, 0x0978, 0x3FDC,
0x0654, 0x09D8, 0x3FD4,
0x0604, 0x0A34, 0x3FC8,
0x05B0, 0x0A90, 0x3FC0,
0x055C, 0x0AF0, 0x3FB4,
0x050C, 0x0B48, 0x3FAC,
0x04BC, 0x0BA0, 0x3FA4,
0x0470, 0x0BF4, 0x3F9C,
0x0420, 0x0C50, 0x3F90,
0x03D8, 0x0C9C, 0x3F8C,
0x038C, 0x0CF0, 0x3F84,
0x0344, 0x0D40, 0x3F7C,
0x0300, 0x0D88, 0x3F78,
0x02BC, 0x0DD0, 0x3F74,
0x027C, 0x0E14, 0x3F70,
0x023C, 0x0E54, 0x3F70,
0x0200, 0x0E90, 0x3F70,
0x01C8, 0x0EC8, 0x3F70,
0x0190, 0x0EFC, 0x3F74,
0x015C, 0x0F2C, 0x3F78,
0x0128, 0x0F5C, 0x3F7C,
0x00FC, 0x0F7C, 0x3F88,
0x00CC, 0x0FA4, 0x3F90,
0x00A4, 0x0FC0, 0x3F9C,
Annotation
- Immediate include surface: `spl_debug.h`, `dc_spl_scl_filters.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.