drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn42.h
Extension
.h
Size
12847 bytes
Lines
304
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dmub_srv_dcn42_reg_offset {
#define DMUB_SR(reg) uint32_t reg;
	DMUB_DCN42_REGS()
	DMCUB_INTERNAL_REGS()
#undef DMUB_SR
};

struct dmub_srv_dcn42_reg_shift {
#define DMUB_SF(reg, field) uint8_t reg##__##field;
	DMUB_DCN42_FIELDS()
#undef DMUB_SF
};

struct dmub_srv_dcn42_reg_mask {
#define DMUB_SF(reg, field) uint32_t reg##__##field;
	DMUB_DCN42_FIELDS()
#undef DMUB_SF
};

struct dmub_srv_dcn42_regs {
	struct dmub_srv_dcn42_reg_offset offset;
	struct dmub_srv_dcn42_reg_mask mask;
	struct dmub_srv_dcn42_reg_shift shift;
};

/* Function declarations */

/* Initialization and configuration */
void dmub_srv_dcn42_regs_init(struct dmub_srv *dmub, struct dc_context *ctx);
void dmub_dcn42_enable_dmub_boot_options(struct dmub_srv *dmub, const struct dmub_srv_hw_params *params);
void dmub_dcn42_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip);
void dmub_dcn42_configure_dmub_in_system_memory(struct dmub_srv *dmub);

/* Reset and control */
void dmub_dcn42_reset(struct dmub_srv *dmub);
void dmub_dcn42_reset_release(struct dmub_srv *dmub);

/* Firmware loading */
void dmub_dcn42_backdoor_load(struct dmub_srv *dmub, const struct dmub_window *cw0, const struct dmub_window *cw1);
void dmub_dcn42_backdoor_load_zfb_mode(struct dmub_srv *dmub, const struct dmub_window *cw0, const struct dmub_window *cw1);
void dmub_dcn42_setup_windows(struct dmub_srv *dmub, const struct dmub_window *cw2, const struct dmub_window *cw3, const struct dmub_window *cw4, const struct dmub_window *cw5, const struct dmub_window *cw6, const struct dmub_window *region6);

/* Mailbox operations - Inbox1 */
void dmub_dcn42_setup_mailbox(struct dmub_srv *dmub, const struct dmub_region *inbox1);
uint32_t dmub_dcn42_get_inbox1_wptr(struct dmub_srv *dmub);
uint32_t dmub_dcn42_get_inbox1_rptr(struct dmub_srv *dmub);
void dmub_dcn42_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);

/* Mailbox operations - Outbox1 */
void dmub_dcn42_setup_out_mailbox(struct dmub_srv *dmub, const struct dmub_region *outbox1);
uint32_t dmub_dcn42_get_outbox1_wptr(struct dmub_srv *dmub);
void dmub_dcn42_set_outbox1_rptr(struct dmub_srv *dmub, uint32_t rptr_offset);

/* Mailbox operations - Outbox0 */
void dmub_dcn42_setup_outbox0(struct dmub_srv *dmub, const struct dmub_region *outbox0);
uint32_t dmub_dcn42_get_outbox0_wptr(struct dmub_srv *dmub);
void dmub_dcn42_set_outbox0_rptr(struct dmub_srv *dmub, uint32_t rptr_offset);

/* Mailbox operations - Inbox0 */
void dmub_dcn42_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
void dmub_dcn42_clear_inbox0_ack_register(struct dmub_srv *dmub);
uint32_t dmub_dcn42_read_inbox0_ack_register(struct dmub_srv *dmub);

/* REG Inbox0/Outbox0 operations */
void dmub_dcn42_send_reg_inbox0_cmd_msg(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);
uint32_t dmub_dcn42_read_reg_inbox0_rsp_int_status(struct dmub_srv *dmub);
void dmub_dcn42_read_reg_inbox0_cmd_rsp(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);
void dmub_dcn42_write_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub);
void dmub_dcn42_clear_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub);
void dmub_dcn42_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable);

void dmub_dcn42_write_reg_outbox0_rdy_int_ack(struct dmub_srv *dmub);
void dmub_dcn42_read_reg_outbox0_msg(struct dmub_srv *dmub, uint32_t *msg);
void dmub_dcn42_write_reg_outbox0_rsp(struct dmub_srv *dmub, uint32_t *rsp);
uint32_t dmub_dcn42_read_reg_outbox0_rsp_int_status(struct dmub_srv *dmub);
void dmub_dcn42_enable_reg_outbox0_rdy_int(struct dmub_srv *dmub, bool enable);
uint32_t dmub_dcn42_read_reg_outbox0_rdy_int_status(struct dmub_srv *dmub);

/* GPINT operations */
void dmub_dcn42_set_gpint(struct dmub_srv *dmub, union dmub_gpint_data_register reg);
bool dmub_dcn42_is_gpint_acked(struct dmub_srv *dmub, union dmub_gpint_data_register reg);
uint32_t dmub_dcn42_get_gpint_response(struct dmub_srv *dmub);
uint32_t dmub_dcn42_get_gpint_dataout(struct dmub_srv *dmub);

/* Status and detection */
bool dmub_dcn42_is_hw_init(struct dmub_srv *dmub);
bool dmub_dcn42_is_supported(struct dmub_srv *dmub);
bool dmub_dcn42_is_hw_powered_up(struct dmub_srv *dmub);
bool dmub_dcn42_should_detect(struct dmub_srv *dmub);

Annotation

Implementation Notes