drivers/gpu/drm/amd/display/include/dal_asic_id.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/include/dal_asic_id.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/include/dal_asic_id.h
Extension
.h
Size
10666 bytes
Lines
319
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DAL_ASIC_ID_H__
#define __DAL_ASIC_ID_H__

/*
 * ASIC internal revision ID
 */

/* DCE60 (based on si_id.h in GPUOpen-Tools CodeXL) */
#define SI_TAHITI_P_A0    0x01
#define SI_TAHITI_P_B0    0x05
#define SI_TAHITI_P_B1    0x06
#define SI_PITCAIRN_PM_A0 0x14
#define SI_PITCAIRN_PM_A1 0x15
#define SI_CAPEVERDE_M_A0 0x28
#define SI_CAPEVERDE_M_A1 0x29
#define SI_OLAND_M_A0     0x3C
#define SI_HAINAN_V_A0    0x46

#define SI_UNKNOWN        0xFF

#define ASIC_REV_IS_TAHITI_P(rev) \
	((rev >= SI_TAHITI_P_A0) && (rev < SI_PITCAIRN_PM_A0))

#define ASIC_REV_IS_PITCAIRN_PM(rev) \
	((rev >= SI_PITCAIRN_PM_A0) && (rev < SI_CAPEVERDE_M_A0))

#define ASIC_REV_IS_CAPEVERDE_M(rev) \
	((rev >= SI_CAPEVERDE_M_A0) && (rev < SI_OLAND_M_A0))

#define ASIC_REV_IS_OLAND_M(rev) \
	((rev >= SI_OLAND_M_A0) && (rev < SI_HAINAN_V_A0))

#define ASIC_REV_IS_HAINAN_V(rev) \
	((rev >= SI_HAINAN_V_A0) && (rev < SI_UNKNOWN))

/* DCE80 (based on ci_id.h in Perforce) */
#define	CI_BONAIRE_M_A0 0x14
#define	CI_BONAIRE_M_A1	0x15
#define	CI_HAWAII_P_A0	0x28

#define CI_UNKNOWN	0xFF

#define ASIC_REV_IS_BONAIRE_M(rev) \
	((rev >= CI_BONAIRE_M_A0) && (rev < CI_HAWAII_P_A0))

#define ASIC_REV_IS_HAWAII_P(rev) \
	(rev >= CI_HAWAII_P_A0)

/* KV1 with Spectre GFX core, 8-8-1-2 (CU-Pix-Primitive-RB) */
#define KV_SPECTRE_A0 0x01

/* KV2 with Spooky GFX core, including downgraded from Spectre core,
 * 3-4-1-1 (CU-Pix-Primitive-RB) */
#define KV_SPOOKY_A0 0x41

/* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */
#define KB_KALINDI_A0 0x81

/* KB with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */
#define KB_KALINDI_A1 0x82

/* BV with Kalindi GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */
#define BV_KALINDI_A2 0x85

/* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */
#define ML_GODAVARI_A0 0xA1

/* ML with Godavari GFX core, 2-4-1-1 (CU-Pix-Primitive-RB) */
#define ML_GODAVARI_A1 0xA2

#define KV_UNKNOWN 0xFF

#define ASIC_REV_IS_KALINDI(rev) \
	((rev >= KB_KALINDI_A0) && (rev < KV_UNKNOWN))

#define ASIC_REV_IS_BHAVANI(rev) \
	((rev >= BV_KALINDI_A2) && (rev < ML_GODAVARI_A0))

#define ASIC_REV_IS_GODAVARI(rev) \
	((rev >= ML_GODAVARI_A0) && (rev < KV_UNKNOWN))

/* VI Family */
/* DCE10 */
#define VI_TONGA_P_A0 20
#define VI_TONGA_P_A1 21
#define VI_FIJI_P_A0 60

/* DCE112 */
#define VI_POLARIS10_P_A0 80
#define VI_POLARIS11_M_A0 90

Annotation

Implementation Notes