drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h
Extension
.h
Size
12588 bytes
Lines
439
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct device_id {
	enum dal_device_type device_type:16;
	uint32_t enum_id:16;	/* 1 based enum */
	uint16_t raw_device_tag;
};

struct graphics_object_i2c_info {
	struct gpio_info {
		uint32_t clk_mask_register_index;
		uint32_t clk_en_register_index;
		uint32_t clk_y_register_index;
		uint32_t clk_a_register_index;
		uint32_t data_mask_register_index;
		uint32_t data_en_register_index;
		uint32_t data_y_register_index;
		uint32_t data_a_register_index;

		uint32_t clk_mask_shift;
		uint32_t clk_en_shift;
		uint32_t clk_y_shift;
		uint32_t clk_a_shift;
		uint32_t data_mask_shift;
		uint32_t data_en_shift;
		uint32_t data_y_shift;
		uint32_t data_a_shift;
	} gpio_info;

	bool i2c_hw_assist;
	uint32_t i2c_line;
	uint32_t i2c_engine_id;
	uint32_t i2c_slave_address;
};

struct graphics_object_hpd_info {
	uint8_t hpd_int_gpio_uid;
	uint8_t hpd_active;
};

struct connector_device_tag_info {
	uint32_t acpi_device;
	struct device_id dev_id;
};

struct device_timing {
	struct misc_info {
		uint32_t HORIZONTAL_CUT_OFF:1;
		/* 0=Active High, 1=Active Low */
		uint32_t H_SYNC_POLARITY:1;
		/* 0=Active High, 1=Active Low */
		uint32_t V_SYNC_POLARITY:1;
		uint32_t VERTICAL_CUT_OFF:1;
		uint32_t H_REPLICATION_BY2:1;
		uint32_t V_REPLICATION_BY2:1;
		uint32_t COMPOSITE_SYNC:1;
		uint32_t INTERLACE:1;
		uint32_t DOUBLE_CLOCK:1;
		uint32_t RGB888:1;
		uint32_t GREY_LEVEL:2;
		uint32_t SPATIAL:1;
		uint32_t TEMPORAL:1;
		uint32_t API_ENABLED:1;
	} misc_info;

	uint32_t pixel_clk; /* in KHz */
	uint32_t horizontal_addressable;
	uint32_t horizontal_blanking_time;
	uint32_t vertical_addressable;
	uint32_t vertical_blanking_time;
	uint32_t horizontal_sync_offset;
	uint32_t horizontal_sync_width;
	uint32_t vertical_sync_offset;
	uint32_t vertical_sync_width;
	uint32_t horizontal_border;
	uint32_t vertical_border;
};

struct supported_refresh_rate {
	uint32_t REFRESH_RATE_30HZ:1;
	uint32_t REFRESH_RATE_40HZ:1;
	uint32_t REFRESH_RATE_48HZ:1;
	uint32_t REFRESH_RATE_50HZ:1;
	uint32_t REFRESH_RATE_60HZ:1;
};

struct embedded_panel_info {
	struct device_timing lcd_timing;
	uint32_t ss_id;
	struct supported_refresh_rate supported_rr;
	uint32_t drr_enabled;
	uint32_t min_drr_refresh_rate;

Annotation

Implementation Notes