drivers/gpu/drm/amd/display/include/link_service_types.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/include/link_service_types.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/include/link_service_types.h
Extension
.h
Size
9040 bytes
Lines
264
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct link_training_settings {
	struct dc_link_settings link_settings;

	/* TODO: turn lane settings below into mandatory fields
	 * as initial lane configuration
	 */
	enum dc_voltage_swing *voltage_swing;
	enum dc_pre_emphasis *pre_emphasis;
	enum dc_post_cursor2 *post_cursor2;
	bool should_set_fec_ready;
	union dc_dp_ffe_preset *ffe_preset;

	uint16_t cr_pattern_time;
	uint16_t eq_pattern_time;
	uint16_t cds_pattern_time;
	enum dc_dp_training_pattern pattern_for_cr;
	enum dc_dp_training_pattern pattern_for_eq;
	enum dc_dp_training_pattern pattern_for_cds;

	uint32_t eq_wait_time_limit;
	uint8_t eq_loop_count_limit;
	uint32_t cds_wait_time_limit;

	bool enhanced_framing;
	enum lttpr_mode lttpr_mode;

	bool lttpr_early_tps2;

	/* disallow different lanes to have different lane settings */
	bool disallow_per_lane_settings;
	/* dpcd lane settings will always use the same hw lane settings
	 * even if it doesn't match requested lane adjust */
	bool always_match_dpcd_with_hw_lane_settings;

	/*****************************************************************
	* training states - parameters that can change in link training
	*****************************************************************/
	/* TODO: Move hw_lane_settings and dpcd_lane_settings
	 * along with lane adjust, lane align, offset and all
	 * other training states into a new structure called
	 * training states, so link_training_settings becomes
	 * a constant input pre-decided prior to link training.
	 *
	 * The goal is to strictly decouple link training settings
	 * decision making process from link training states to
	 * prevent it from messy code practice of changing training
	 * decision on the fly.
	 */
	struct dc_lane_settings hw_lane_settings[LANE_COUNT_DP_MAX];
	union dpcd_training_lane dpcd_lane_settings[LANE_COUNT_DP_MAX];
};

/*TODO: Move this enum test harness*/
/* Test patterns*/
enum dp_test_pattern {
	/* Input data is pass through Scrambler
	 * and 8b10b Encoder straight to output*/
	DP_TEST_PATTERN_VIDEO_MODE = 0,

	/* phy test patterns*/
	DP_TEST_PATTERN_PHY_PATTERN_BEGIN,
	DP_TEST_PATTERN_D102 = DP_TEST_PATTERN_PHY_PATTERN_BEGIN,
	DP_TEST_PATTERN_SYMBOL_ERROR,
	DP_TEST_PATTERN_PRBS7,
	DP_TEST_PATTERN_80BIT_CUSTOM,
	DP_TEST_PATTERN_CP2520_1,
	DP_TEST_PATTERN_CP2520_2,
	DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE = DP_TEST_PATTERN_CP2520_2,
	DP_TEST_PATTERN_CP2520_3,
	DP_TEST_PATTERN_128b_132b_TPS1,
	DP_TEST_PATTERN_128b_132b_TPS2,
	DP_TEST_PATTERN_PRBS9,
	DP_TEST_PATTERN_PRBS11,
	DP_TEST_PATTERN_PRBS15,
	DP_TEST_PATTERN_PRBS23,
	DP_TEST_PATTERN_PRBS31,
	DP_TEST_PATTERN_264BIT_CUSTOM,
	DP_TEST_PATTERN_SQUARE_BEGIN,
	DP_TEST_PATTERN_SQUARE = DP_TEST_PATTERN_SQUARE_BEGIN,
	DP_TEST_PATTERN_SQUARE_PRESHOOT_DISABLED,
	DP_TEST_PATTERN_SQUARE_DEEMPHASIS_DISABLED,
	DP_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED,
	DP_TEST_PATTERN_SQUARE_END = DP_TEST_PATTERN_SQUARE_PRESHOOT_DEEMPHASIS_DISABLED,

	/* Link Training Patterns */
	DP_TEST_PATTERN_TRAINING_PATTERN1,
	DP_TEST_PATTERN_TRAINING_PATTERN2,
	DP_TEST_PATTERN_TRAINING_PATTERN3,
	DP_TEST_PATTERN_TRAINING_PATTERN4,
	DP_TEST_PATTERN_128b_132b_TPS1_TRAINING_MODE,

Annotation

Implementation Notes