drivers/gpu/drm/amd/display/modules/power/power_psr.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/modules/power/power_psr.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/modules/power/power_psr.c
Extension
.c
Size
20706 bytes
Lines
666
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (psr_enable) {
				if (state != PSR_STATE0 &&
						(!force_static || state == PSR_STATE3))
					break;
			} else {
				if (state == PSR_STATE0)
					break;
			}
			udelay(500);
		}

		DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_INFORMATION,
							WPP_BIT_FLAG_Firmware_PsrState,
							"set psr enable: END WAIT: psr_enable=%d",
							(int)psr_enable);

		/* assert if max retry hit */
		if (retry_count >= max_retry) {
			ASSERT(0);
			DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_ERROR,
								WPP_BIT_FLAG_Firmware_PsrState,
								"set psr enable: ERROR: retry_count=%u: Unexpectedly long wait for PSR state change.",
								retry_count);
		}
	} else {
		DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_INFORMATION,
							WPP_BIT_FLAG_Firmware_PsrState,
							"set psr enable: PSR state change initiated (wait=false): psr_enable=%d",
							(int)psr_enable);
	}

	return true;
}

bool mod_power_get_psr_event(struct mod_power *mod_power,
			struct dc_stream_state *stream,
			unsigned int *active_psr_events)
{
	struct core_power *core_power = NULL;
	unsigned int stream_index = 0;

	if (mod_power == NULL)
		return false;

	core_power = MOD_POWER_TO_CORE(mod_power);

	if (core_power->num_entities == 0)
		return false;

	stream_index = map_index_from_stream(core_power, stream);

	if (!core_power->map[stream_index].caps->psr_version)
		return false;

	*active_psr_events = core_power->map[stream_index].psr_events;

	return true;
}

bool mod_power_set_psr_event(struct mod_power *mod_power,
		struct dc_stream_state *stream, bool set_event,
		enum psr_event event, bool wait)
{
	struct core_power *core_power = NULL;
	unsigned int stream_index = 0;
	unsigned int active_psr_events = 0;
	bool psr_enable_request = false;
	bool force_static = false;

	if (mod_power == NULL || stream == NULL)
		return false;

	core_power = MOD_POWER_TO_CORE(mod_power);
	stream_index = map_index_from_stream(core_power, stream);

	if (core_power->num_entities == 0) {
		DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_ERROR,
							WPP_BIT_FLAG_Firmware_PsrState,
							"mod_power set_psr_event: ERROR: stream=%p event=%d num_entities=%u",
							stream,
							(int)event,
							core_power->num_entities);
		return false;
	}

	if (!core_power->map[stream_index].caps->psr_version)
		return false;

	if (set_event)
		core_power->map[stream_index].psr_events |= event;

Annotation

Implementation Notes