drivers/gpu/drm/amd/include/amdgpu_reg_state.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/amdgpu_reg_state.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/include/amdgpu_reg_state.h
Extension
.h
Size
4377 bytes
Lines
154
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct amdgpu_reg_state_header {
	uint16_t		structure_size;
	uint8_t			format_revision;
	uint8_t			content_revision;
	uint8_t			state_type;
	uint8_t			num_instances;
	uint16_t		pad;
};

enum amdgpu_reg_inst_state {
	AMDGPU_INST_S_OK,
	AMDGPU_INST_S_EDISABLED,
	AMDGPU_INST_S_EACCESS,
};

struct amdgpu_smn_reg_data {
	uint64_t addr;
	uint32_t value;
	uint32_t pad;
};

struct amdgpu_reg_inst_header {
	uint16_t	instance;
	uint16_t	state;
	uint16_t	num_smn_regs;
	uint16_t	pad;
};


struct amdgpu_regs_xgmi_v1_0 {
	struct amdgpu_reg_inst_header	inst_header;

	struct amdgpu_smn_reg_data	smn_reg_values[];
};

struct amdgpu_reg_state_xgmi_v1_0 {
	/* common_header.state_type must be AMDGPU_REG_STATE_TYPE_XGMI */
	struct amdgpu_reg_state_header	common_header;

	struct amdgpu_regs_xgmi_v1_0	xgmi_state_regs[];
};

struct amdgpu_regs_wafl_v1_0 {
	struct amdgpu_reg_inst_header	inst_header;

	struct amdgpu_smn_reg_data	smn_reg_values[];
};

struct amdgpu_reg_state_wafl_v1_0 {
	/* common_header.state_type must be AMDGPU_REG_STATE_TYPE_WAFL */
	struct amdgpu_reg_state_header	common_header;

	struct amdgpu_regs_wafl_v1_0	wafl_state_regs[];
};

struct amdgpu_regs_pcie_v1_0 {
	struct amdgpu_reg_inst_header	inst_header;

	uint16_t			device_status;
	uint16_t			link_status;
	uint32_t			sub_bus_number_latency;
	uint32_t			pcie_corr_err_status;
	uint32_t			pcie_uncorr_err_status;

	struct amdgpu_smn_reg_data	smn_reg_values[];
};

struct amdgpu_reg_state_pcie_v1_0 {
	/* common_header.state_type must be AMDGPU_REG_STATE_TYPE_PCIE */
	struct amdgpu_reg_state_header	common_header;

	struct amdgpu_regs_pcie_v1_0	pci_state_regs[];
};

struct amdgpu_regs_usr_v1_0 {
	struct amdgpu_reg_inst_header	inst_header;

	struct amdgpu_smn_reg_data	smn_reg_values[];
};

struct amdgpu_reg_state_usr_v1_0 {
	/* common_header.state_type must be AMDGPU_REG_STATE_TYPE_USR */
	struct amdgpu_reg_state_header	common_header;

	struct amdgpu_regs_usr_v1_0	usr_state_regs[];
};

static inline size_t amdgpu_reginst_size(uint16_t num_inst, size_t inst_size,
					 uint16_t num_regs)
{

Annotation

Implementation Notes