drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_sh_mask.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_sh_mask.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_sh_mask.h
Extension
.h
Size
107516 bytes
Lines
2046
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _athub_1_0_SH_MASK_HEADER
#define _athub_1_0_SH_MASK_HEADER


// addressBlock: athub_atsdec
//ATC_ATS_CNTL
#define ATC_ATS_CNTL__DISABLE_ATC__SHIFT	0x0
#define ATC_ATS_CNTL__DISABLE_PRI__SHIFT	0x1
#define ATC_ATS_CNTL__DISABLE_PASID__SHIFT	0x2
#define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT	0x8
#define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT	0x14
#define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT	0x15
#define ATC_ATS_CNTL__TRANS_EXE_RETURN__SHIFT	0x16
#define ATC_ATS_CNTL__DISABLE_ATC_MASK	0x00000001L
#define ATC_ATS_CNTL__DISABLE_PRI_MASK	0x00000002L
#define ATC_ATS_CNTL__DISABLE_PASID_MASK	0x00000004L
#define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK	0x00003F00L
#define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER_MASK	0x00100000L
#define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER_MASK	0x00200000L
#define ATC_ATS_CNTL__TRANS_EXE_RETURN_MASK	0x00C00000L
//ATC_ATS_STATUS
#define ATC_ATS_STATUS__BUSY__SHIFT	0x0
#define ATC_ATS_STATUS__CRASHED__SHIFT	0x1
#define ATC_ATS_STATUS__DEADLOCK_DETECTION__SHIFT	0x2
#define ATC_ATS_STATUS__FLUSH_INVALIDATION_OUTSTANDING__SHIFT	0x3
#define ATC_ATS_STATUS__NONFLUSH_INVALIDATION_OUTSTANDING__SHIFT	0x6
#define ATC_ATS_STATUS__BUSY_MASK	0x00000001L
#define ATC_ATS_STATUS__CRASHED_MASK	0x00000002L
#define ATC_ATS_STATUS__DEADLOCK_DETECTION_MASK	0x00000004L
#define ATC_ATS_STATUS__FLUSH_INVALIDATION_OUTSTANDING_MASK	0x00000038L
#define ATC_ATS_STATUS__NONFLUSH_INVALIDATION_OUTSTANDING_MASK	0x000001C0L
//ATC_ATS_FAULT_CNTL
#define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG__SHIFT	0x0
#define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE__SHIFT	0xa
#define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE__SHIFT	0x14
#define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG_MASK	0x000001FFL
#define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE_MASK	0x0007FC00L
#define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE_MASK	0x1FF00000L
//ATC_ATS_FAULT_STATUS_INFO
#define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE__SHIFT	0x0
#define ATC_ATS_FAULT_STATUS_INFO__VMID__SHIFT	0xa
#define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO__SHIFT	0xf
#define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2__SHIFT	0x10
#define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION__SHIFT	0x11
#define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST__SHIFT	0x12
#define ATC_ATS_FAULT_STATUS_INFO__STATUS__SHIFT	0x13
#define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH__SHIFT	0x18
#define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE_MASK	0x000001FFL
#define ATC_ATS_FAULT_STATUS_INFO__VMID_MASK	0x00007C00L
#define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO_MASK	0x00008000L
#define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2_MASK	0x00010000L
#define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION_MASK	0x00020000L
#define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST_MASK	0x00040000L
#define ATC_ATS_FAULT_STATUS_INFO__STATUS_MASK	0x00F80000L
#define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH_MASK	0x0F000000L
//ATC_ATS_FAULT_STATUS_ADDR
#define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR__SHIFT	0x0
#define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR_MASK	0xFFFFFFFFL
//ATC_ATS_DEFAULT_PAGE_LOW
#define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE__SHIFT	0x0
#define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE_MASK	0xFFFFFFFFL
//ATC_TRANS_FAULT_RSPCNTRL
#define ATC_TRANS_FAULT_RSPCNTRL__VMID0__SHIFT	0x0
#define ATC_TRANS_FAULT_RSPCNTRL__VMID1__SHIFT	0x1
#define ATC_TRANS_FAULT_RSPCNTRL__VMID2__SHIFT	0x2
#define ATC_TRANS_FAULT_RSPCNTRL__VMID3__SHIFT	0x3
#define ATC_TRANS_FAULT_RSPCNTRL__VMID4__SHIFT	0x4
#define ATC_TRANS_FAULT_RSPCNTRL__VMID5__SHIFT	0x5
#define ATC_TRANS_FAULT_RSPCNTRL__VMID6__SHIFT	0x6
#define ATC_TRANS_FAULT_RSPCNTRL__VMID7__SHIFT	0x7
#define ATC_TRANS_FAULT_RSPCNTRL__VMID8__SHIFT	0x8
#define ATC_TRANS_FAULT_RSPCNTRL__VMID9__SHIFT	0x9
#define ATC_TRANS_FAULT_RSPCNTRL__VMID10__SHIFT	0xa
#define ATC_TRANS_FAULT_RSPCNTRL__VMID11__SHIFT	0xb
#define ATC_TRANS_FAULT_RSPCNTRL__VMID12__SHIFT	0xc
#define ATC_TRANS_FAULT_RSPCNTRL__VMID13__SHIFT	0xd
#define ATC_TRANS_FAULT_RSPCNTRL__VMID14__SHIFT	0xe
#define ATC_TRANS_FAULT_RSPCNTRL__VMID15__SHIFT	0xf
#define ATC_TRANS_FAULT_RSPCNTRL__VMID16__SHIFT	0x10
#define ATC_TRANS_FAULT_RSPCNTRL__VMID17__SHIFT	0x11
#define ATC_TRANS_FAULT_RSPCNTRL__VMID18__SHIFT	0x12
#define ATC_TRANS_FAULT_RSPCNTRL__VMID19__SHIFT	0x13
#define ATC_TRANS_FAULT_RSPCNTRL__VMID20__SHIFT	0x14
#define ATC_TRANS_FAULT_RSPCNTRL__VMID21__SHIFT	0x15
#define ATC_TRANS_FAULT_RSPCNTRL__VMID22__SHIFT	0x16
#define ATC_TRANS_FAULT_RSPCNTRL__VMID23__SHIFT	0x17
#define ATC_TRANS_FAULT_RSPCNTRL__VMID24__SHIFT	0x18
#define ATC_TRANS_FAULT_RSPCNTRL__VMID25__SHIFT	0x19
#define ATC_TRANS_FAULT_RSPCNTRL__VMID26__SHIFT	0x1a
#define ATC_TRANS_FAULT_RSPCNTRL__VMID27__SHIFT	0x1b

Annotation

Implementation Notes