drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_default.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_default.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_default.h- Extension
.h- Size
- 23287 bytes
- Lines
- 273
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _athub_2_0_0_DEFAULT_HEADER
#define _athub_2_0_0_DEFAULT_HEADER
// addressBlock: athub_atsdec
#define mmATC_ATS_CNTL_DEFAULT 0x009a0c00
#define mmATC_ATS_STATUS_DEFAULT 0x00000000
#define mmATC_ATS_FAULT_CNTL_DEFAULT 0x000001ff
#define mmATC_ATS_FAULT_STATUS_INFO_DEFAULT 0x00000000
#define mmATC_ATS_FAULT_STATUS_ADDR_DEFAULT 0x00000000
#define mmATC_ATS_DEFAULT_PAGE_LOW_DEFAULT 0x00000000
#define mmATC_TRANS_FAULT_RSPCNTRL_DEFAULT 0xffffffff
#define mmATC_ATS_FAULT_STATUS_INFO2_DEFAULT 0x00000000
#define mmATHUB_MISC_CNTL_DEFAULT 0x001c0200
#define mmATC_VMID_PASID_MAPPING_UPDATE_STATUS_DEFAULT 0x00000000
#define mmATC_VMID0_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID1_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID2_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID3_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID4_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID5_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID6_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID7_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID8_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID9_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID10_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID11_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID12_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID13_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID14_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID15_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_ATS_VMID_STATUS_DEFAULT 0x00000000
#define mmATC_ATS_GFX_ATCL2_STATUS_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER0_CFG_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER1_CFG_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER2_CFG_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER3_CFG_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
#define mmATC_PERFCOUNTER_LO_DEFAULT 0x00000000
#define mmATC_PERFCOUNTER_HI_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_DEFAULT 0x00000000
#define mmATHUB_PCIE_PASID_CNTL_DEFAULT 0x00000000
#define mmATHUB_PCIE_PAGE_REQ_CNTL_DEFAULT 0x00000000
#define mmATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC_DEFAULT 0x00000000
#define mmATHUB_COMMAND_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_0_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_1_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_2_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_3_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_4_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_5_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_6_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_7_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_8_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_9_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_10_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_11_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_12_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_13_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_14_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_15_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_16_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_17_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_18_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_19_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_20_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_21_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_22_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_23_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_24_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_25_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_26_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_27_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_28_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_29_DEFAULT 0x00000000
#define mmATHUB_PCIE_ATS_CNTL_VF_30_DEFAULT 0x00000000
#define mmATHUB_MEM_POWER_LS_DEFAULT 0x00000208
#define mmATS_IH_CREDIT_DEFAULT 0x00150002
#define mmATHUB_IH_CREDIT_DEFAULT 0x00020002
#define mmATC_VMID16_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID17_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID18_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID19_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID20_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID21_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID22_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID23_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID24_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID25_PASID_MAPPING_DEFAULT 0x00000000
#define mmATC_VMID26_PASID_MAPPING_DEFAULT 0x00000000
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.