drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_1_offset.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_1_offset.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/gc/gc_12_1_1_offset.h- Extension
.h- Size
- 11915 bytes
- Lines
- 150
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _gc_12_1_1_OFFSET_HEADER
#define _gc_12_1_1_OFFSET_HEADER
// addressBlock: aigc_grbma_grbma_grbmadec
// base address: 0x18000
#define regGRBMA_GFX_INDEX 0x0011
#define regGRBMA_GFX_INDEX_BASE_IDX 1
// addressBlock: aigc_grbma_grbma_perfddec
// base address: 0x19200
#define regGRBMA_PERFCOUNTER0_LO 0x0480
#define regGRBMA_PERFCOUNTER0_LO_BASE_IDX 1
#define regGRBMA_PERFCOUNTER0_HI 0x0481
#define regGRBMA_PERFCOUNTER0_HI_BASE_IDX 1
#define regGRBMA_PERFCOUNTER1_LO 0x0482
#define regGRBMA_PERFCOUNTER1_LO_BASE_IDX 1
#define regGRBMA_PERFCOUNTER1_HI 0x0483
#define regGRBMA_PERFCOUNTER1_HI_BASE_IDX 1
// addressBlock: aigc_grbma_grbma_perfsdec
// base address: 0x19300
#define regGRBMA_PERFCOUNTER0_SELECT 0x04c0
#define regGRBMA_PERFCOUNTER0_SELECT_BASE_IDX 1
#define regGRBMA_PERFCOUNTER1_SELECT 0x04c1
#define regGRBMA_PERFCOUNTER1_SELECT_BASE_IDX 1
#define regAID_PERFMON_CNTL 0x04c2
#define regAID_PERFMON_CNTL_BASE_IDX 1
// addressBlock: aigc_gl2x_gfx_se_perfsdec
// base address: 0x19300
#define regGL2C_PERFCOUNTER0_SELECT 0x04e8
#define regGL2C_PERFCOUNTER0_SELECT_BASE_IDX 1
#define regGL2C_PERFCOUNTER0_SELECT1 0x04e9
#define regGL2C_PERFCOUNTER0_SELECT1_BASE_IDX 1
#define regGL2C_PERFCOUNTER1_SELECT 0x04ea
#define regGL2C_PERFCOUNTER1_SELECT_BASE_IDX 1
#define regGL2C_PERFCOUNTER1_SELECT1 0x04eb
#define regGL2C_PERFCOUNTER1_SELECT1_BASE_IDX 1
#define regGL2C_PERFCOUNTER2_SELECT 0x04ec
#define regGL2C_PERFCOUNTER2_SELECT_BASE_IDX 1
#define regGL2C_PERFCOUNTER2_SELECT1 0x04ed
#define regGL2C_PERFCOUNTER2_SELECT1_BASE_IDX 1
#define regGL2C_PERFCOUNTER3_SELECT 0x04ee
#define regGL2C_PERFCOUNTER3_SELECT_BASE_IDX 1
#define regGL2C_PERFCOUNTER3_SELECT1 0x04ef
#define regGL2C_PERFCOUNTER3_SELECT1_BASE_IDX 1
#define regGL2A_PERFCOUNTER0_SELECT 0x04f0
#define regGL2A_PERFCOUNTER0_SELECT_BASE_IDX 1
#define regGL2A_PERFCOUNTER0_SELECT1 0x04f1
#define regGL2A_PERFCOUNTER0_SELECT1_BASE_IDX 1
#define regGL2A_PERFCOUNTER1_SELECT 0x04f2
#define regGL2A_PERFCOUNTER1_SELECT_BASE_IDX 1
#define regGL2A_PERFCOUNTER1_SELECT1 0x04f3
#define regGL2A_PERFCOUNTER1_SELECT1_BASE_IDX 1
#define regGL2A_PERFCOUNTER2_SELECT 0x04f4
#define regGL2A_PERFCOUNTER2_SELECT_BASE_IDX 1
#define regGL2A_PERFCOUNTER2_SELECT1 0x04f5
#define regGL2A_PERFCOUNTER2_SELECT1_BASE_IDX 1
#define regGL2A_PERFCOUNTER3_SELECT 0x04f6
#define regGL2A_PERFCOUNTER3_SELECT_BASE_IDX 1
#define regGL2A_PERFCOUNTER3_SELECT1 0x04f7
#define regGL2A_PERFCOUNTER3_SELECT1_BASE_IDX 1
// addressBlock: aigc_gl2x_gfx_se_perfddec
// base address: 0x19200
#define regGL2C_PERFCOUNTER0_LO 0x04a0
#define regGL2C_PERFCOUNTER0_LO_BASE_IDX 1
#define regGL2C_PERFCOUNTER0_HI 0x04a1
#define regGL2C_PERFCOUNTER0_HI_BASE_IDX 1
#define regGL2C_PERFCOUNTER1_LO 0x04a2
#define regGL2C_PERFCOUNTER1_LO_BASE_IDX 1
#define regGL2C_PERFCOUNTER1_HI 0x04a3
#define regGL2C_PERFCOUNTER1_HI_BASE_IDX 1
#define regGL2C_PERFCOUNTER2_LO 0x04a4
#define regGL2C_PERFCOUNTER2_LO_BASE_IDX 1
#define regGL2C_PERFCOUNTER2_HI 0x04a5
#define regGL2C_PERFCOUNTER2_HI_BASE_IDX 1
#define regGL2C_PERFCOUNTER3_LO 0x04a6
#define regGL2C_PERFCOUNTER3_LO_BASE_IDX 1
#define regGL2C_PERFCOUNTER3_HI 0x04a7
#define regGL2C_PERFCOUNTER3_HI_BASE_IDX 1
#define regGL2A_PERFCOUNTER0_LO 0x04a8
#define regGL2A_PERFCOUNTER0_LO_BASE_IDX 1
#define regGL2A_PERFCOUNTER0_HI 0x04a9Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.