drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h- Extension
.h- Size
- 218729 bytes
- Lines
- 2533
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef GFX_7_0_D_H
#define GFX_7_0_D_H
#define mmCB_BLEND_RED 0xa105
#define mmCB_BLEND_GREEN 0xa106
#define mmCB_BLEND_BLUE 0xa107
#define mmCB_BLEND_ALPHA 0xa108
#define mmCB_COLOR_CONTROL 0xa202
#define mmCB_BLEND0_CONTROL 0xa1e0
#define mmCB_BLEND1_CONTROL 0xa1e1
#define mmCB_BLEND2_CONTROL 0xa1e2
#define mmCB_BLEND3_CONTROL 0xa1e3
#define mmCB_BLEND4_CONTROL 0xa1e4
#define mmCB_BLEND5_CONTROL 0xa1e5
#define mmCB_BLEND6_CONTROL 0xa1e6
#define mmCB_BLEND7_CONTROL 0xa1e7
#define mmCB_COLOR0_BASE 0xa318
#define mmCB_COLOR1_BASE 0xa327
#define mmCB_COLOR2_BASE 0xa336
#define mmCB_COLOR3_BASE 0xa345
#define mmCB_COLOR4_BASE 0xa354
#define mmCB_COLOR5_BASE 0xa363
#define mmCB_COLOR6_BASE 0xa372
#define mmCB_COLOR7_BASE 0xa381
#define mmCB_COLOR0_PITCH 0xa319
#define mmCB_COLOR1_PITCH 0xa328
#define mmCB_COLOR2_PITCH 0xa337
#define mmCB_COLOR3_PITCH 0xa346
#define mmCB_COLOR4_PITCH 0xa355
#define mmCB_COLOR5_PITCH 0xa364
#define mmCB_COLOR6_PITCH 0xa373
#define mmCB_COLOR7_PITCH 0xa382
#define mmCB_COLOR0_SLICE 0xa31a
#define mmCB_COLOR1_SLICE 0xa329
#define mmCB_COLOR2_SLICE 0xa338
#define mmCB_COLOR3_SLICE 0xa347
#define mmCB_COLOR4_SLICE 0xa356
#define mmCB_COLOR5_SLICE 0xa365
#define mmCB_COLOR6_SLICE 0xa374
#define mmCB_COLOR7_SLICE 0xa383
#define mmCB_COLOR0_VIEW 0xa31b
#define mmCB_COLOR1_VIEW 0xa32a
#define mmCB_COLOR2_VIEW 0xa339
#define mmCB_COLOR3_VIEW 0xa348
#define mmCB_COLOR4_VIEW 0xa357
#define mmCB_COLOR5_VIEW 0xa366
#define mmCB_COLOR6_VIEW 0xa375
#define mmCB_COLOR7_VIEW 0xa384
#define mmCB_COLOR0_INFO 0xa31c
#define mmCB_COLOR1_INFO 0xa32b
#define mmCB_COLOR2_INFO 0xa33a
#define mmCB_COLOR3_INFO 0xa349
#define mmCB_COLOR4_INFO 0xa358
#define mmCB_COLOR5_INFO 0xa367
#define mmCB_COLOR6_INFO 0xa376
#define mmCB_COLOR7_INFO 0xa385
#define mmCB_COLOR0_ATTRIB 0xa31d
#define mmCB_COLOR1_ATTRIB 0xa32c
#define mmCB_COLOR2_ATTRIB 0xa33b
#define mmCB_COLOR3_ATTRIB 0xa34a
#define mmCB_COLOR4_ATTRIB 0xa359
#define mmCB_COLOR5_ATTRIB 0xa368
#define mmCB_COLOR6_ATTRIB 0xa377
#define mmCB_COLOR7_ATTRIB 0xa386
#define mmCB_COLOR0_CMASK 0xa31f
#define mmCB_COLOR1_CMASK 0xa32e
#define mmCB_COLOR2_CMASK 0xa33d
#define mmCB_COLOR3_CMASK 0xa34c
#define mmCB_COLOR4_CMASK 0xa35b
#define mmCB_COLOR5_CMASK 0xa36a
#define mmCB_COLOR6_CMASK 0xa379
#define mmCB_COLOR7_CMASK 0xa388
#define mmCB_COLOR0_CMASK_SLICE 0xa320
#define mmCB_COLOR1_CMASK_SLICE 0xa32f
#define mmCB_COLOR2_CMASK_SLICE 0xa33e
#define mmCB_COLOR3_CMASK_SLICE 0xa34d
#define mmCB_COLOR4_CMASK_SLICE 0xa35c
#define mmCB_COLOR5_CMASK_SLICE 0xa36b
#define mmCB_COLOR6_CMASK_SLICE 0xa37a
#define mmCB_COLOR7_CMASK_SLICE 0xa389
#define mmCB_COLOR0_FMASK 0xa321
#define mmCB_COLOR1_FMASK 0xa330
#define mmCB_COLOR2_FMASK 0xa33f
#define mmCB_COLOR3_FMASK 0xa34e
#define mmCB_COLOR4_FMASK 0xa35d
#define mmCB_COLOR5_FMASK 0xa36c
#define mmCB_COLOR6_FMASK 0xa37b
#define mmCB_COLOR7_FMASK 0xa38a
#define mmCB_COLOR0_FMASK_SLICE 0xa322
#define mmCB_COLOR1_FMASK_SLICE 0xa331Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.