drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h- Extension
.h- Size
- 49851 bytes
- Lines
- 1275
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef GMC_6_0_D_H
#define GMC_6_0_D_H
#define ixMC_IO_DEBUG_ACMD_CLKSEL_D0 0x00CE
#define ixMC_IO_DEBUG_ACMD_CLKSEL_D1 0x00DE
#define ixMC_IO_DEBUG_ACMD_MISC_D0 0x00AE
#define ixMC_IO_DEBUG_ACMD_MISC_D1 0x00BE
#define ixMC_IO_DEBUG_ACMD_OFSCAL_D0 0x00EE
#define ixMC_IO_DEBUG_ACMD_OFSCAL_D1 0x00FE
#define ixMC_IO_DEBUG_ACMD_RXPHASE_D0 0x010E
#define ixMC_IO_DEBUG_ACMD_RXPHASE_D1 0x011E
#define ixMC_IO_DEBUG_ACMD_TXBST_PD_D0 0x018E
#define ixMC_IO_DEBUG_ACMD_TXBST_PD_D1 0x019E
#define ixMC_IO_DEBUG_ACMD_TXBST_PU_D0 0x01AE
#define ixMC_IO_DEBUG_ACMD_TXBST_PU_D1 0x01BE
#define ixMC_IO_DEBUG_ACMD_TXPHASE_D0 0x012E
#define ixMC_IO_DEBUG_ACMD_TXPHASE_D1 0x013E
#define ixMC_IO_DEBUG_ACMD_TXSLF_D0 0x016E
#define ixMC_IO_DEBUG_ACMD_TXSLF_D1 0x017E
#define ixMC_IO_DEBUG_ADDRH_CLKSEL_D0 0x00CD
#define ixMC_IO_DEBUG_ADDRH_CLKSEL_D1 0x00DD
#define ixMC_IO_DEBUG_ADDRH_MISC_D0 0x00AD
#define ixMC_IO_DEBUG_ADDRH_MISC_D1 0x00BD
#define ixMC_IO_DEBUG_ADDRH_RXPHASE_D0 0x010D
#define ixMC_IO_DEBUG_ADDRH_RXPHASE_D1 0x011D
#define ixMC_IO_DEBUG_ADDRH_TXBST_PD_D0 0x018D
#define ixMC_IO_DEBUG_ADDRH_TXBST_PD_D1 0x019D
#define ixMC_IO_DEBUG_ADDRH_TXBST_PU_D0 0x01AD
#define ixMC_IO_DEBUG_ADDRH_TXBST_PU_D1 0x01BD
#define ixMC_IO_DEBUG_ADDRH_TXPHASE_D0 0x012D
#define ixMC_IO_DEBUG_ADDRH_TXPHASE_D1 0x013D
#define ixMC_IO_DEBUG_ADDRH_TXSLF_D0 0x016D
#define ixMC_IO_DEBUG_ADDRH_TXSLF_D1 0x017D
#define ixMC_IO_DEBUG_ADDRL_CLKSEL_D0 0x00CC
#define ixMC_IO_DEBUG_ADDRL_CLKSEL_D1 0x00DC
#define ixMC_IO_DEBUG_ADDRL_MISC_D0 0x00AC
#define ixMC_IO_DEBUG_ADDRL_MISC_D1 0x00BC
#define ixMC_IO_DEBUG_ADDRL_RXPHASE_D0 0x010C
#define ixMC_IO_DEBUG_ADDRL_RXPHASE_D1 0x011C
#define ixMC_IO_DEBUG_ADDRL_TXBST_PD_D0 0x018C
#define ixMC_IO_DEBUG_ADDRL_TXBST_PD_D1 0x019C
#define ixMC_IO_DEBUG_ADDRL_TXBST_PU_D0 0x01AC
#define ixMC_IO_DEBUG_ADDRL_TXBST_PU_D1 0x01BC
#define ixMC_IO_DEBUG_ADDRL_TXPHASE_D0 0x012C
#define ixMC_IO_DEBUG_ADDRL_TXPHASE_D1 0x013C
#define ixMC_IO_DEBUG_ADDRL_TXSLF_D0 0x016C
#define ixMC_IO_DEBUG_ADDRL_TXSLF_D1 0x017C
#define ixMC_IO_DEBUG_CK_CLKSEL_D0 0x00CB
#define ixMC_IO_DEBUG_CK_CLKSEL_D1 0x00DB
#define ixMC_IO_DEBUG_CK_MISC_D0 0x00AB
#define ixMC_IO_DEBUG_CK_MISC_D1 0x00BB
#define ixMC_IO_DEBUG_CK_RXPHASE_D0 0x010B
#define ixMC_IO_DEBUG_CK_RXPHASE_D1 0x011B
#define ixMC_IO_DEBUG_CK_TXBST_PD_D0 0x018B
#define ixMC_IO_DEBUG_CK_TXBST_PD_D1 0x019B
#define ixMC_IO_DEBUG_CK_TXBST_PU_D0 0x01AB
#define ixMC_IO_DEBUG_CK_TXBST_PU_D1 0x01BB
#define ixMC_IO_DEBUG_CK_TXPHASE_D0 0x012B
#define ixMC_IO_DEBUG_CK_TXPHASE_D1 0x013B
#define ixMC_IO_DEBUG_CK_TXSLF_D0 0x016B
#define ixMC_IO_DEBUG_CK_TXSLF_D1 0x017B
#define ixMC_IO_DEBUG_CMD_CLKSEL_D0 0x00CF
#define ixMC_IO_DEBUG_CMD_CLKSEL_D1 0x00DF
#define ixMC_IO_DEBUG_CMD_MISC_D0 0x00AF
#define ixMC_IO_DEBUG_CMD_MISC_D1 0x00BF
#define ixMC_IO_DEBUG_CMD_OFSCAL_D0 0x00EF
#define ixMC_IO_DEBUG_CMD_OFSCAL_D1 0x00FF
#define ixMC_IO_DEBUG_CMD_RX_EQ_D0 0x01CF
#define ixMC_IO_DEBUG_CMD_RX_EQ_D1 0x01DF
#define ixMC_IO_DEBUG_CMD_RXPHASE_D0 0x010F
#define ixMC_IO_DEBUG_CMD_RXPHASE_D1 0x011F
#define ixMC_IO_DEBUG_CMD_TXBST_PD_D0 0x018F
#define ixMC_IO_DEBUG_CMD_TXBST_PD_D1 0x019F
#define ixMC_IO_DEBUG_CMD_TXBST_PU_D0 0x01AF
#define ixMC_IO_DEBUG_CMD_TXBST_PU_D1 0x01BF
#define ixMC_IO_DEBUG_CMD_TXPHASE_D0 0x012F
#define ixMC_IO_DEBUG_CMD_TXPHASE_D1 0x013F
#define ixMC_IO_DEBUG_CMD_TXSLF_D0 0x016F
#define ixMC_IO_DEBUG_CMD_TXSLF_D1 0x017F
#define ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D0 0x014F
#define ixMC_IO_DEBUG_DBI_CDR_PHSIZE_D1 0x015F
#define ixMC_IO_DEBUG_DBI_CLKSEL_D0 0x00C8
#define ixMC_IO_DEBUG_DBI_CLKSEL_D1 0x00D8
#define ixMC_IO_DEBUG_DBI_MISC_D0 0x00A8
#define ixMC_IO_DEBUG_DBI_MISC_D1 0x00B8
#define ixMC_IO_DEBUG_DBI_OFSCAL_D0 0x00E8
#define ixMC_IO_DEBUG_DBI_OFSCAL_D1 0x00F8
#define ixMC_IO_DEBUG_DBI_RX_EQ_D0 0x01C8
#define ixMC_IO_DEBUG_DBI_RX_EQ_D1 0x01D8
#define ixMC_IO_DEBUG_DBI_RXPHASE_D0 0x0108
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.