drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_d.h- Extension
.h- Size
- 124420 bytes
- Lines
- 1465
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef GMC_7_1_D_H
#define GMC_7_1_D_H
#define mmMC_CONFIG 0x800
#define mmMC_ARB_AGE_CNTL 0x9bf
#define mmMC_ARB_RET_CREDITS2 0x9c0
#define mmMC_ARB_FED_CNTL 0x9c1
#define mmMC_ARB_GECC2_STATUS 0x9c2
#define mmMC_ARB_GECC2_MISC 0x9c3
#define mmMC_ARB_GECC2_DEBUG 0x9c4
#define mmMC_ARB_GECC2_DEBUG2 0x9c5
#define mmMC_ARB_PERF_CID 0x9c6
#define mmMC_ARB_GECC2 0x9c9
#define mmMC_ARB_GECC2_CLI 0x9ca
#define mmMC_ARB_ADDR_SWIZ0 0x9cb
#define mmMC_ARB_ADDR_SWIZ1 0x9cc
#define mmMC_ARB_MISC3 0x9cd
#define mmMC_ARB_WCDR_2 0x9ce
#define mmMC_ARB_RTT_DATA 0x9cf
#define mmMC_ARB_RTT_CNTL0 0x9d0
#define mmMC_ARB_RTT_CNTL1 0x9d1
#define mmMC_ARB_RTT_CNTL2 0x9d2
#define mmMC_ARB_RTT_DEBUG 0x9d3
#define mmMC_ARB_CAC_CNTL 0x9d4
#define mmMC_ARB_MISC2 0x9d5
#define mmMC_ARB_MISC 0x9d6
#define mmMC_ARB_BANKMAP 0x9d7
#define mmMC_ARB_RAMCFG 0x9d8
#define mmMC_ARB_POP 0x9d9
#define mmMC_ARB_MINCLKS 0x9da
#define mmMC_ARB_SQM_CNTL 0x9db
#define mmMC_ARB_ADDR_HASH 0x9dc
#define mmMC_ARB_DRAM_TIMING 0x9dd
#define mmMC_ARB_DRAM_TIMING2 0x9de
#define mmMC_ARB_WTM_CNTL_RD 0x9df
#define mmMC_ARB_WTM_CNTL_WR 0x9e0
#define mmMC_ARB_WTM_GRPWT_RD 0x9e1
#define mmMC_ARB_WTM_GRPWT_WR 0x9e2
#define mmMC_ARB_TM_CNTL_RD 0x9e3
#define mmMC_ARB_TM_CNTL_WR 0x9e4
#define mmMC_ARB_LAZY0_RD 0x9e5
#define mmMC_ARB_LAZY0_WR 0x9e6
#define mmMC_ARB_LAZY1_RD 0x9e7
#define mmMC_ARB_LAZY1_WR 0x9e8
#define mmMC_ARB_AGE_RD 0x9e9
#define mmMC_ARB_AGE_WR 0x9ea
#define mmMC_ARB_RFSH_CNTL 0x9eb
#define mmMC_ARB_RFSH_RATE 0x9ec
#define mmMC_ARB_PM_CNTL 0x9ed
#define mmMC_ARB_GDEC_RD_CNTL 0x9ee
#define mmMC_ARB_GDEC_WR_CNTL 0x9ef
#define mmMC_ARB_LM_RD 0x9f0
#define mmMC_ARB_LM_WR 0x9f1
#define mmMC_ARB_REMREQ 0x9f2
#define mmMC_ARB_REPLAY 0x9f3
#define mmMC_ARB_RET_CREDITS_RD 0x9f4
#define mmMC_ARB_RET_CREDITS_WR 0x9f5
#define mmMC_ARB_MAX_LAT_CID 0x9f6
#define mmMC_ARB_MAX_LAT_RSLT0 0x9f7
#define mmMC_ARB_MAX_LAT_RSLT1 0x9f8
#define mmMC_ARB_SSM 0x9f9
#define mmMC_ARB_CG 0x9fa
#define mmMC_ARB_WCDR 0x9fb
#define mmMC_ARB_DRAM_TIMING_1 0x9fc
#define mmMC_ARB_BUSY_STATUS 0x9fd
#define mmMC_ARB_DRAM_TIMING2_1 0x9ff
#define mmMC_ARB_BURST_TIME 0xa02
#define mmMC_CITF_XTRA_ENABLE 0x96d
#define mmCC_MC_MAX_CHANNEL 0x96e
#define mmMC_CG_CONFIG 0x96f
#define mmMC_CITF_CNTL 0x970
#define mmMC_CITF_CREDITS_VM 0x971
#define mmMC_CITF_CREDITS_ARB_RD 0x972
#define mmMC_CITF_CREDITS_ARB_WR 0x973
#define mmMC_CITF_DAGB_CNTL 0x974
#define mmMC_CITF_INT_CREDITS 0x975
#define mmMC_CITF_RET_MODE 0x976
#define mmMC_CITF_DAGB_DLY 0x977
#define mmMC_RD_GRP_EXT 0x978
#define mmMC_WR_GRP_EXT 0x979
#define mmMC_CITF_REMREQ 0x97a
#define mmMC_WR_TC0 0x97b
#define mmMC_WR_TC1 0x97c
#define mmMC_CITF_INT_CREDITS_WR 0x97d
#define mmMC_CITF_WTM_RD_CNTL 0x97f
#define mmMC_CITF_WTM_WR_CNTL 0x980
#define mmMC_RD_CB 0x981
#define mmMC_RD_DB 0x982
#define mmMC_RD_TC0 0x983
#define mmMC_RD_TC1 0x984Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.