drivers/gpu/drm/amd/include/asic_reg/lsdma/lsdma_7_0_0_sh_mask.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/lsdma/lsdma_7_0_0_sh_mask.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/lsdma/lsdma_7_0_0_sh_mask.h- Extension
.h- Size
- 147790 bytes
- Lines
- 1412
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _lsdma_7_0_0_SH_MASK_HEADER
#define _lsdma_7_0_0_SH_MASK_HEADER
// addressBlock: lsdma0_lsdma0dec
//LSDMA_UCODE_ADDR
#define LSDMA_UCODE_ADDR__VALUE__SHIFT 0x0
#define LSDMA_UCODE_ADDR__VALUE_MASK 0x00001FFFL
//LSDMA_UCODE_DATA
#define LSDMA_UCODE_DATA__VALUE__SHIFT 0x0
#define LSDMA_UCODE_DATA__VALUE_MASK 0xFFFFFFFFL
//LSDMA_ERROR_INJECT_CNTL
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_IRRITATION__SHIFT 0x0
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_SINGLE_WRITE__SHIFT 0x1
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_ERROR_INJECT__SHIFT 0x2
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_MEMHUB_READ_POISON_INJECT__SHIFT 0x8
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_MEMHUB_ATOMIC_POISON_INJECT__SHIFT 0x9
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_IRRITATION_MASK 0x00000001L
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_SINGLE_WRITE_MASK 0x00000002L
#define LSDMA_ERROR_INJECT_CNTL__ENABLE_ERROR_INJECT_MASK 0x0000000CL
//LSDMA_ERROR_INJECT_SELECT
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF0__SHIFT 0x0
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF1__SHIFT 0x1
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF2__SHIFT 0x2
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF3__SHIFT 0x3
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF4__SHIFT 0x4
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF5__SHIFT 0x5
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF6__SHIFT 0x6
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF7__SHIFT 0x7
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF8__SHIFT 0x8
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF9__SHIFT 0x9
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF10__SHIFT 0xa
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF11__SHIFT 0xb
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF12__SHIFT 0xc
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF13__SHIFT 0xd
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF14__SHIFT 0xe
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF15__SHIFT 0xf
#define LSDMA_ERROR_INJECT_SELECT__UCODE_BUF__SHIFT 0x10
#define LSDMA_ERROR_INJECT_SELECT__RB_CMD_BUF__SHIFT 0x11
#define LSDMA_ERROR_INJECT_SELECT__IB_CMD_BUF__SHIFT 0x12
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_RD_FIFO__SHIFT 0x13
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_RDBST_FIFO__SHIFT 0x14
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_WR_FIFO__SHIFT 0x15
#define LSDMA_ERROR_INJECT_SELECT__DATA_LUT_FIFO__SHIFT 0x16
#define LSDMA_ERROR_INJECT_SELECT__SPLIT_DATA_FIFO__SHIFT 0x17
#define LSDMA_ERROR_INJECT_SELECT__MC_WR_ADDR_FIFO__SHIFT 0x18
#define LSDMA_ERROR_INJECT_SELECT__MC_RDRET_BUF__SHIFT 0x19
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF0_MASK 0x00000001L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF1_MASK 0x00000002L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF2_MASK 0x00000004L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF3_MASK 0x00000008L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF4_MASK 0x00000010L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF5_MASK 0x00000020L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF6_MASK 0x00000040L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF7_MASK 0x00000080L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF8_MASK 0x00000100L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF9_MASK 0x00000200L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF10_MASK 0x00000400L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF11_MASK 0x00000800L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF12_MASK 0x00001000L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF13_MASK 0x00002000L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF14_MASK 0x00004000L
#define LSDMA_ERROR_INJECT_SELECT__MBANK_DATA_BUF15_MASK 0x00008000L
#define LSDMA_ERROR_INJECT_SELECT__UCODE_BUF_MASK 0x00010000L
#define LSDMA_ERROR_INJECT_SELECT__RB_CMD_BUF_MASK 0x00020000L
#define LSDMA_ERROR_INJECT_SELECT__IB_CMD_BUF_MASK 0x00040000L
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_RD_FIFO_MASK 0x00080000L
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_RDBST_FIFO_MASK 0x00100000L
#define LSDMA_ERROR_INJECT_SELECT__UTCL1_WR_FIFO_MASK 0x00200000L
#define LSDMA_ERROR_INJECT_SELECT__DATA_LUT_FIFO_MASK 0x00400000L
#define LSDMA_ERROR_INJECT_SELECT__SPLIT_DATA_FIFO_MASK 0x00800000L
#define LSDMA_ERROR_INJECT_SELECT__MC_WR_ADDR_FIFO_MASK 0x01000000L
#define LSDMA_ERROR_INJECT_SELECT__MC_RDRET_BUF_MASK 0x02000000L
#define LSDMA_PUB_REG_TYPE0__LSDMA_UCODE_ADDR__SHIFT 0x0
#define LSDMA_PUB_REG_TYPE0__LSDMA_UCODE_DATA__SHIFT 0x1
#define LSDMA_PUB_REG_TYPE0__LSDMA_UCODE_ADDR_MASK 0x00000001L
#define LSDMA_PUB_REG_TYPE0__LSDMA_UCODE_DATA_MASK 0x00000002L
#define LSDMA_PUB_REG_TYPE3__LSDMA_CLK_CTRL__SHIFT 0xb
#define LSDMA_PUB_REG_TYPE3__LSDMA_CLK_CTRL_MASK 0x00000800L
//LSDMA_CONTEXT_GROUP_BOUNDARY
#define LSDMA_CONTEXT_GROUP_BOUNDARY__RESERVED__SHIFT 0x0
#define LSDMA_CONTEXT_GROUP_BOUNDARY__RESERVED_MASK 0xFFFFFFFFL
//LSDMA_RB_RPTR_FETCH_HI
#define LSDMA_RB_RPTR_FETCH_HI__OFFSET__SHIFT 0x0
#define LSDMA_RB_RPTR_FETCH_HI__OFFSET_MASK 0xFFFFFFFFL
//LSDMA_SEM_WAIT_FAIL_TIMER_CNTL
#define LSDMA_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0
#define LSDMA_SEM_WAIT_FAIL_TIMER_CNTL__TIMER_MASK 0xFFFFFFFFL
//LSDMA_RB_RPTR_FETCH
#define LSDMA_RB_RPTR_FETCH__OFFSET__SHIFT 0x2Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.