drivers/gpu/drm/amd/include/asic_reg/lsdma/lsdma_7_1_0_offset.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/include/asic_reg/lsdma/lsdma_7_1_0_offset.h

Extension

.h

Size

2953 bytes

Lines

45

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _lsdma_7_1_0_OFFSET_HEADER
#define _lsdma_7_1_0_OFFSET_HEADER

#define regLSDMA_PIO_SRC_ADDR_LO                                                                        0x0080
#define regLSDMA_PIO_SRC_ADDR_LO_BASE_IDX                                                               0
#define regLSDMA_PIO_SRC_ADDR_HI                                                                        0x0081
#define regLSDMA_PIO_SRC_ADDR_HI_BASE_IDX                                                               0
#define regLSDMA_PIO_DST_ADDR_LO                                                                        0x0082
#define regLSDMA_PIO_DST_ADDR_LO_BASE_IDX                                                               0
#define regLSDMA_PIO_DST_ADDR_HI                                                                        0x0083
#define regLSDMA_PIO_DST_ADDR_HI_BASE_IDX                                                               0
#define regLSDMA_PIO_COMMAND                                                                            0x0084
#define regLSDMA_PIO_COMMAND_BASE_IDX                                                                   0
#define regLSDMA_PIO_CONSTFILL_DATA                                                                     0x0085
#define regLSDMA_PIO_CONSTFILL_DATA_BASE_IDX                                                            0
#define regLSDMA_PIO_CONTROL                                                                            0x0086
#define regLSDMA_PIO_CONTROL_BASE_IDX                                                                   0

#define regLSDMA_PIO_STATUS                                                                             0x008a
#define regLSDMA_PIO_STATUS_BASE_IDX                                                                    0

#endif

Annotation

• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.