drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_sh_mask.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_sh_mask.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_sh_mask.h- Extension
.h- Size
- 52589 bytes
- Lines
- 627
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _mp_15_0_0_SH_MASK_HEADER
#define _mp_15_0_0_SH_MASK_HEADER
// addressBlock: mp_SmuMpASP_SmnDec
//MPASP_SMN_C2PMSG_60
#define MPASP_SMN_C2PMSG_60__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_61
#define MPASP_SMN_C2PMSG_61__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_62
#define MPASP_SMN_C2PMSG_62__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_63
#define MPASP_SMN_C2PMSG_63__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_64
#define MPASP_SMN_C2PMSG_64__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_65
#define MPASP_SMN_C2PMSG_65__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_66
#define MPASP_SMN_C2PMSG_66__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_67
#define MPASP_SMN_C2PMSG_67__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_68
#define MPASP_SMN_C2PMSG_68__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_69
#define MPASP_SMN_C2PMSG_69__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_70
#define MPASP_SMN_C2PMSG_70__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_71
#define MPASP_SMN_C2PMSG_71__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_72
#define MPASP_SMN_C2PMSG_72__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_73
#define MPASP_SMN_C2PMSG_73__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_74
#define MPASP_SMN_C2PMSG_74__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_75
#define MPASP_SMN_C2PMSG_75__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_76
#define MPASP_SMN_C2PMSG_76__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_77
#define MPASP_SMN_C2PMSG_77__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_78
#define MPASP_SMN_C2PMSG_78__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_79
#define MPASP_SMN_C2PMSG_79__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_100
#define MPASP_SMN_C2PMSG_100__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_101
#define MPASP_SMN_C2PMSG_101__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_102
#define MPASP_SMN_C2PMSG_102__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_103
#define MPASP_SMN_C2PMSG_103__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_C2PMSG_109
#define MPASP_SMN_C2PMSG_109__CONTENT__SHIFT 0x0
#define MPASP_SMN_C2PMSG_109__CONTENT_MASK 0xFFFFFFFFL
//MPASP_SMN_IH_CREDIT
#define MPASP_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0
#define MPASP_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10
#define MPASP_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L
#define MPASP_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L
//MPASP_SMN_IH_SW_INT
#define MPASP_SMN_IH_SW_INT__ID__SHIFT 0x0
#define MPASP_SMN_IH_SW_INT__VALID__SHIFT 0x8
#define MPASP_SMN_IH_SW_INT__ID_MASK 0x000000FFL
#define MPASP_SMN_IH_SW_INT__VALID_MASK 0x00000100LAnnotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.