drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h- Extension
.h- Size
- 7400 bytes
- Lines
- 193
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef SMU_6_0_D_H
#define SMU_6_0_D_H
#define ixLCAC_MC0_CNTL 0x011C
#define ixLCAC_MC0_OVR_SEL 0x011D
#define ixLCAC_MC0_OVR_VAL 0x011E
#define ixLCAC_MC1_CNTL 0x011F
#define ixLCAC_MC1_OVR_SEL 0x0120
#define ixLCAC_MC1_OVR_VAL 0x0121
#define ixLCAC_MC2_CNTL 0x0122
#define ixLCAC_MC2_OVR_SEL 0x0123
#define ixLCAC_MC2_OVR_VAL 0x0124
#define ixLCAC_MC3_CNTL 0x0125
#define ixLCAC_MC3_OVR_SEL 0x0126
#define ixLCAC_MC3_OVR_VAL 0x0127
#define ixLCAC_MC4_CNTL 0x0128
#define ixLCAC_MC4_OVR_SEL 0x0129
#define ixLCAC_MC4_OVR_VAL 0x012A
#define ixLCAC_MC5_CNTL 0x012B
#define ixLCAC_MC5_OVR_SEL 0x012C
#define ixLCAC_MC5_OVR_VAL 0x012D
#define mmCG_SPLL_FUNC_CNTL 0x0180
#define mmCG_SPLL_FUNC_CNTL_2 0x0181
#define mmCG_SPLL_FUNC_CNTL_3 0x0182
#define mmCG_SPLL_FUNC_CNTL_4 0x0183
#define mmCG_SPLL_STATUS 0x0185
#define mmSPLL_CNTL_MODE 0x0186
#define mmCG_SPLL_SPREAD_SPECTRUM 0x0188
#define mmCG_SPLL_SPREAD_SPECTRUM_2 0x0189
#define mmCG_SPLL_AUTOSCALE_CNTL 0x018B
#define mmMPLL_BYPASSCLK_SEL 0x0197
#define mmCG_CLKPIN_CNTL 0x0198
#define mmCG_CLKPIN_CNTL_2 0x0199
#define mmTHM_CLK_CNTL 0x019B
#define mmMISC_CLK_CNTL 0x019C
#define mmCG_THERMAL_CTRL 0x01C0
#define mmCG_THERMAL_STATUS 0x01C1
#define mmCG_THERMAL_INT 0x01C2
#define mmCG_MULT_THERMAL_CTRL 0x01C4
#define mmCG_MULT_THERMAL_STATUS 0x01C5
#define mmCG_FDO_CTRL0 0x01D5
#define mmCG_FDO_CTRL1 0x01D6
#define mmCG_FDO_CTRL2 0x01D7
#define mmCG_TACH_CTRL 0x01DC
#define mmCG_TACH_STATUS 0x01DD
#define mmGENERAL_PWRMGT 0x1E0
#define mmCG_TPC 0x1E1
#define mmSCLK_PWRMGT_CNTL 0x1E2
#define mmTARGET_AND_CURRENT_PROFILE_INDEX 0x01E6
#define mmCG_FTV 0x01EF
#define mmCG_FFCT_0 0x01F0
#define mmCG_BSP 0x01FF
#define mmCG_AT 0x0200
#define mmCG_GIT 0x0201
#define mmCG_SSP 0x0203
#define mmCG_DISPLAY_GAP_CNTL 0x020A
#define mmCG_ULV_CONTROL 0x021E
#define mmCG_ULV_PARAMETER 0x021F
#define mmSMC_SCRATCH0 0x0221
#define mmCG_CAC_CTRL 0x022E
#define ixSMC_PC_C 0x80000370
#define ixTHM_TMON0_DEBUG 0x03F0
#define ixTHM_TMON0_INT_DATA 0x0380
#define ixTHM_TMON0_RDIL0_DATA 0x0300
#define ixTHM_TMON0_RDIL10_DATA 0x030A
#define ixTHM_TMON0_RDIL11_DATA 0x030B
#define ixTHM_TMON0_RDIL12_DATA 0x030C
#define ixTHM_TMON0_RDIL13_DATA 0x030D
#define ixTHM_TMON0_RDIL14_DATA 0x030E
#define ixTHM_TMON0_RDIL15_DATA 0x030F
#define ixTHM_TMON0_RDIL1_DATA 0x0301
#define ixTHM_TMON0_RDIL2_DATA 0x0302
#define ixTHM_TMON0_RDIL3_DATA 0x0303
#define ixTHM_TMON0_RDIL4_DATA 0x0304
#define ixTHM_TMON0_RDIL5_DATA 0x0305
#define ixTHM_TMON0_RDIL6_DATA 0x0306
#define ixTHM_TMON0_RDIL7_DATA 0x0307
#define ixTHM_TMON0_RDIL8_DATA 0x0308
#define ixTHM_TMON0_RDIL9_DATA 0x0309
#define ixTHM_TMON0_RDIR0_DATA 0x0310
#define ixTHM_TMON0_RDIR10_DATA 0x031A
#define ixTHM_TMON0_RDIR11_DATA 0x031B
#define ixTHM_TMON0_RDIR12_DATA 0x031C
#define ixTHM_TMON0_RDIR13_DATA 0x031D
#define ixTHM_TMON0_RDIR14_DATA 0x031E
#define ixTHM_TMON0_RDIR15_DATA 0x031F
#define ixTHM_TMON0_RDIR1_DATA 0x0311
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.