drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_9_0_offset.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_9_0_offset.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_9_0_offset.h
Extension
.h
Size
17393 bytes
Lines
182
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef _smuio_9_0_OFFSET_HEADER
#define _smuio_9_0_OFFSET_HEADER



// addressBlock: smuio_smuio_SmuSmuioDec
// base address: 0x5a000
#define mmROM_CNTL                                                                                     0x0024
#define mmROM_CNTL_BASE_IDX                                                                            0
#define mmROM_STATUS                                                                                   0x0026
#define mmROM_STATUS_BASE_IDX                                                                          0
#define mmCGTT_ROM_CLK_CTRL0                                                                           0x0027
#define mmCGTT_ROM_CLK_CTRL0_BASE_IDX                                                                  0
#define mmROM_INDEX                                                                                    0x0028
#define mmROM_INDEX_BASE_IDX                                                                           0
#define mmROM_DATA                                                                                     0x0029
#define mmROM_DATA_BASE_IDX                                                                            0
#define mmROM_START                                                                                    0x002a
#define mmROM_START_BASE_IDX                                                                           0
#define mmROM_SW_CNTL                                                                                  0x002b
#define mmROM_SW_CNTL_BASE_IDX                                                                         0
#define mmROM_SW_STATUS                                                                                0x002c
#define mmROM_SW_STATUS_BASE_IDX                                                                       0
#define mmROM_SW_COMMAND                                                                               0x002d
#define mmROM_SW_COMMAND_BASE_IDX                                                                      0
#define mmROM_SW_DATA_1                                                                                0x002e
#define mmROM_SW_DATA_1_BASE_IDX                                                                       0
#define mmROM_SW_DATA_2                                                                                0x002f
#define mmROM_SW_DATA_2_BASE_IDX                                                                       0
#define mmROM_SW_DATA_3                                                                                0x0030
#define mmROM_SW_DATA_3_BASE_IDX                                                                       0
#define mmROM_SW_DATA_4                                                                                0x0031
#define mmROM_SW_DATA_4_BASE_IDX                                                                       0
#define mmROM_SW_DATA_5                                                                                0x0032
#define mmROM_SW_DATA_5_BASE_IDX                                                                       0
#define mmROM_SW_DATA_6                                                                                0x0033
#define mmROM_SW_DATA_6_BASE_IDX                                                                       0
#define mmROM_SW_DATA_7                                                                                0x0034
#define mmROM_SW_DATA_7_BASE_IDX                                                                       0
#define mmROM_SW_DATA_8                                                                                0x0035
#define mmROM_SW_DATA_8_BASE_IDX                                                                       0
#define mmROM_SW_DATA_9                                                                                0x0036
#define mmROM_SW_DATA_9_BASE_IDX                                                                       0
#define mmROM_SW_DATA_10                                                                               0x0037
#define mmROM_SW_DATA_10_BASE_IDX                                                                      0
#define mmROM_SW_DATA_11                                                                               0x0038
#define mmROM_SW_DATA_11_BASE_IDX                                                                      0
#define mmROM_SW_DATA_12                                                                               0x0039
#define mmROM_SW_DATA_12_BASE_IDX                                                                      0
#define mmROM_SW_DATA_13                                                                               0x003a
#define mmROM_SW_DATA_13_BASE_IDX                                                                      0
#define mmROM_SW_DATA_14                                                                               0x003b
#define mmROM_SW_DATA_14_BASE_IDX                                                                      0
#define mmROM_SW_DATA_15                                                                               0x003c
#define mmROM_SW_DATA_15_BASE_IDX                                                                      0
#define mmROM_SW_DATA_16                                                                               0x003d
#define mmROM_SW_DATA_16_BASE_IDX                                                                      0
#define mmROM_SW_DATA_17                                                                               0x003e
#define mmROM_SW_DATA_17_BASE_IDX                                                                      0
#define mmROM_SW_DATA_18                                                                               0x003f
#define mmROM_SW_DATA_18_BASE_IDX                                                                      0
#define mmROM_SW_DATA_19                                                                               0x0040
#define mmROM_SW_DATA_19_BASE_IDX                                                                      0
#define mmROM_SW_DATA_20                                                                               0x0041
#define mmROM_SW_DATA_20_BASE_IDX                                                                      0
#define mmROM_SW_DATA_21                                                                               0x0042
#define mmROM_SW_DATA_21_BASE_IDX                                                                      0
#define mmROM_SW_DATA_22                                                                               0x0043
#define mmROM_SW_DATA_22_BASE_IDX                                                                      0
#define mmROM_SW_DATA_23                                                                               0x0044
#define mmROM_SW_DATA_23_BASE_IDX                                                                      0
#define mmROM_SW_DATA_24                                                                               0x0045
#define mmROM_SW_DATA_24_BASE_IDX                                                                      0
#define mmROM_SW_DATA_25                                                                               0x0046
#define mmROM_SW_DATA_25_BASE_IDX                                                                      0
#define mmROM_SW_DATA_26                                                                               0x0047
#define mmROM_SW_DATA_26_BASE_IDX                                                                      0
#define mmROM_SW_DATA_27                                                                               0x0048
#define mmROM_SW_DATA_27_BASE_IDX                                                                      0
#define mmROM_SW_DATA_28                                                                               0x0049
#define mmROM_SW_DATA_28_BASE_IDX                                                                      0
#define mmROM_SW_DATA_29                                                                               0x004a
#define mmROM_SW_DATA_29_BASE_IDX                                                                      0
#define mmROM_SW_DATA_30                                                                               0x004b
#define mmROM_SW_DATA_30_BASE_IDX                                                                      0
#define mmROM_SW_DATA_31                                                                               0x004c
#define mmROM_SW_DATA_31_BASE_IDX                                                                      0
#define mmROM_SW_DATA_32                                                                               0x004d
#define mmROM_SW_DATA_32_BASE_IDX                                                                      0
#define mmROM_SW_DATA_33                                                                               0x004e

Annotation

Implementation Notes