drivers/gpu/drm/amd/include/asic_reg/thm/thm_14_0_2_offset.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/thm/thm_14_0_2_offset.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/thm/thm_14_0_2_offset.h- Extension
.h- Size
- 22545 bytes
- Lines
- 229
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _thm_14_0_2_OFFSET_HEADER
#define _thm_14_0_2_OFFSET_HEADER
// addressBlock: thm_thm_SmuThmDec
// base address: 0x59800
#define regTHM_TCON_CUR_TMP 0x0000
#define regTHM_TCON_CUR_TMP_BASE_IDX 0
#define regTHM_TCON_HTC 0x0001
#define regTHM_TCON_HTC_BASE_IDX 0
#define regTHM_TCON_THERM_TRIP 0x0002
#define regTHM_TCON_THERM_TRIP_BASE_IDX 0
#define regTHM_CTF_DELAY 0x0003
#define regTHM_CTF_DELAY_BASE_IDX 0
#define regTHM_GPIO_PROCHOT_CTRL 0x0004
#define regTHM_GPIO_PROCHOT_CTRL_BASE_IDX 0
#define regTHM_GPIO_THERMTRIP_CTRL 0x0005
#define regTHM_GPIO_THERMTRIP_CTRL_BASE_IDX 0
#define regTHM_GPIO_PWM_CTRL 0x0006
#define regTHM_GPIO_PWM_CTRL_BASE_IDX 0
#define regTHM_GPIO_TACHIN_CTRL 0x0007
#define regTHM_GPIO_TACHIN_CTRL_BASE_IDX 0
#define regTHM_GPIO_PUMPOUT_CTRL 0x0008
#define regTHM_GPIO_PUMPOUT_CTRL_BASE_IDX 0
#define regTHM_GPIO_PUMPIN_CTRL 0x0009
#define regTHM_GPIO_PUMPIN_CTRL_BASE_IDX 0
#define regTHM_THERMAL_INT_ENA 0x000a
#define regTHM_THERMAL_INT_ENA_BASE_IDX 0
#define regTHM_THERMAL_INT_CTRL 0x000b
#define regTHM_THERMAL_INT_CTRL_BASE_IDX 0
#define regTHM_THERMAL_INT_STATUS 0x000c
#define regTHM_THERMAL_INT_STATUS_BASE_IDX 0
#define regTHM_SW_TEMP 0x000d
#define regTHM_SW_TEMP_BASE_IDX 0
#define regCG_MULT_THERMAL_CTRL 0x000e
#define regCG_MULT_THERMAL_CTRL_BASE_IDX 0
#define regCG_MULT_THERMAL_STATUS 0x000f
#define regCG_MULT_THERMAL_STATUS_BASE_IDX 0
#define regCG_THERMAL_RANGE 0x0010
#define regCG_THERMAL_RANGE_BASE_IDX 0
#define regCG_FDO_CTRL0 0x0011
#define regCG_FDO_CTRL0_BASE_IDX 0
#define regCG_FDO_CTRL1 0x0012
#define regCG_FDO_CTRL1_BASE_IDX 0
#define regCG_FDO_CTRL2 0x0013
#define regCG_FDO_CTRL2_BASE_IDX 0
#define regCG_TACH_CTRL 0x0014
#define regCG_TACH_CTRL_BASE_IDX 0
#define regCG_TACH_STATUS 0x0015
#define regCG_TACH_STATUS_BASE_IDX 0
#define regCG_THERMAL_STATUS 0x0016
#define regCG_THERMAL_STATUS_BASE_IDX 0
#define regCG_PUMP_CTRL0 0x0017
#define regCG_PUMP_CTRL0_BASE_IDX 0
#define regCG_PUMP_CTRL1 0x0018
#define regCG_PUMP_CTRL1_BASE_IDX 0
#define regCG_PUMP_CTRL2 0x0019
#define regCG_PUMP_CTRL2_BASE_IDX 0
#define regCG_PUMP_TACH_CTRL 0x001a
#define regCG_PUMP_TACH_CTRL_BASE_IDX 0
#define regCG_PUMP_TACH_STATUS 0x001b
#define regCG_PUMP_TACH_STATUS_BASE_IDX 0
#define regCG_PUMP_STATUS 0x001c
#define regCG_PUMP_STATUS_BASE_IDX 0
#define regTHM_TCON_LOCAL2 0x001d
#define regTHM_TCON_LOCAL2_BASE_IDX 0
#define regTHM_TCON_LOCAL3 0x001e
#define regTHM_TCON_LOCAL3_BASE_IDX 0
#define regTHM_TCON_LOCAL4 0x001f
#define regTHM_TCON_LOCAL4_BASE_IDX 0
#define regTHM_TCON_LOCAL5 0x0020
#define regTHM_TCON_LOCAL5_BASE_IDX 0
#define regTHM_TCON_LOCAL6 0x0021
#define regTHM_TCON_LOCAL6_BASE_IDX 0
#define regTHM_TCON_LOCAL7 0x0022
#define regTHM_TCON_LOCAL7_BASE_IDX 0
#define regTHM_TCON_LOCAL8 0x0023
#define regTHM_TCON_LOCAL8_BASE_IDX 0
#define regTHM_TCON_LOCAL9 0x0024
#define regTHM_TCON_LOCAL9_BASE_IDX 0
#define regTHM_TCON_LOCAL10 0x0025
#define regTHM_TCON_LOCAL10_BASE_IDX 0
#define regTHM_TCON_LOCAL11 0x0026
#define regTHM_TCON_LOCAL11_BASE_IDX 0
#define regTHM_TCON_LOCAL12 0x0027
#define regTHM_TCON_LOCAL12_BASE_IDX 0
#define regTHM_TCON_LOCAL13 0x0028
#define regTHM_TCON_LOCAL13_BASE_IDX 0
#define regTHM_TCON_LOCAL14 0x0029Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.