drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h- Extension
.h- Size
- 137130 bytes
- Lines
- 1315
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _thm_9_0_SH_MASK_HEADER
#define _thm_9_0_SH_MASK_HEADER
// addressBlock: thm_thm_SmuThmDec
//THM_TCON_CUR_TMP
#define THM_TCON_CUR_TMP__PER_STEP_TIME_UP__SHIFT 0x0
#define THM_TCON_CUR_TMP__TMP_MAX_DIFF_UP__SHIFT 0x5
#define THM_TCON_CUR_TMP__TMP_SLEW_DN_EN__SHIFT 0x7
#define THM_TCON_CUR_TMP__PER_STEP_TIME_DN__SHIFT 0x8
#define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SEL__SHIFT 0x10
#define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SLEW_SEL__SHIFT 0x12
#define THM_TCON_CUR_TMP__CUR_TEMP_RANGE_SEL__SHIFT 0x13
#define THM_TCON_CUR_TMP__MCM_EN__SHIFT 0x14
#define THM_TCON_CUR_TMP__CUR_TEMP__SHIFT 0x15
#define THM_TCON_CUR_TMP__PER_STEP_TIME_UP_MASK 0x0000001FL
#define THM_TCON_CUR_TMP__TMP_MAX_DIFF_UP_MASK 0x00000060L
#define THM_TCON_CUR_TMP__TMP_SLEW_DN_EN_MASK 0x00000080L
#define THM_TCON_CUR_TMP__PER_STEP_TIME_DN_MASK 0x00001F00L
#define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SEL_MASK 0x00030000L
#define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SLEW_SEL_MASK 0x00040000L
#define THM_TCON_CUR_TMP__CUR_TEMP_RANGE_SEL_MASK 0x00080000L
#define THM_TCON_CUR_TMP__MCM_EN_MASK 0x00100000L
#define THM_TCON_CUR_TMP__CUR_TEMP_MASK 0xFFE00000L
//THM_TCON_HTC
#define THM_TCON_HTC__HTC_EN__SHIFT 0x0
#define THM_TCON_HTC__EXTERNAL_PROCHOT__SHIFT 0x2
#define THM_TCON_HTC__INTERNAL_PROCHOT__SHIFT 0x3
#define THM_TCON_HTC__HTC_ACTIVE__SHIFT 0x4
#define THM_TCON_HTC__HTC_ACTIVE_LOG__SHIFT 0x5
#define THM_TCON_HTC__HTC_DIAG__SHIFT 0x8
#define THM_TCON_HTC__DIS_PROCHOT_PIN__SHIFT 0x9
#define THM_TCON_HTC__HTC_TO_IH_EN__SHIFT 0xa
#define THM_TCON_HTC__PROCHOT_TO_IH_EN__SHIFT 0xb
#define THM_TCON_HTC__PROCHOT_EVENT_SRC__SHIFT 0xc
#define THM_TCON_HTC__HTC_TMP_LMT__SHIFT 0x10
#define THM_TCON_HTC__HTC_HYST_LMT__SHIFT 0x17
#define THM_TCON_HTC__HTC_SLEW_SEL__SHIFT 0x1b
#define THM_TCON_HTC__HTC_EN_MASK 0x00000001L
#define THM_TCON_HTC__EXTERNAL_PROCHOT_MASK 0x00000004L
#define THM_TCON_HTC__INTERNAL_PROCHOT_MASK 0x00000008L
#define THM_TCON_HTC__HTC_ACTIVE_MASK 0x00000010L
#define THM_TCON_HTC__HTC_ACTIVE_LOG_MASK 0x00000020L
#define THM_TCON_HTC__HTC_DIAG_MASK 0x00000100L
#define THM_TCON_HTC__DIS_PROCHOT_PIN_MASK 0x00000200L
#define THM_TCON_HTC__HTC_TO_IH_EN_MASK 0x00000400L
#define THM_TCON_HTC__PROCHOT_TO_IH_EN_MASK 0x00000800L
#define THM_TCON_HTC__PROCHOT_EVENT_SRC_MASK 0x00007000L
#define THM_TCON_HTC__HTC_TMP_LMT_MASK 0x007F0000L
#define THM_TCON_HTC__HTC_HYST_LMT_MASK 0x07800000L
#define THM_TCON_HTC__HTC_SLEW_SEL_MASK 0x18000000L
//THM_TCON_THERM_TRIP
#define THM_TCON_THERM_TRIP__CTF_PAD_POLARITY__SHIFT 0x0
#define THM_TCON_THERM_TRIP__THERM_TP__SHIFT 0x1
#define THM_TCON_THERM_TRIP__CTF_THRESHOLD_EXCEEDED__SHIFT 0x2
#define THM_TCON_THERM_TRIP__THERM_TP_SENSE__SHIFT 0x3
#define THM_TCON_THERM_TRIP__RSVD2__SHIFT 0x4
#define THM_TCON_THERM_TRIP__THERM_TP_EN__SHIFT 0x5
#define THM_TCON_THERM_TRIP__THERM_TP_LMT__SHIFT 0x6
#define THM_TCON_THERM_TRIP__RSVD3__SHIFT 0xe
#define THM_TCON_THERM_TRIP__SW_THERM_TP__SHIFT 0x1f
#define THM_TCON_THERM_TRIP__CTF_PAD_POLARITY_MASK 0x00000001L
#define THM_TCON_THERM_TRIP__THERM_TP_MASK 0x00000002L
#define THM_TCON_THERM_TRIP__CTF_THRESHOLD_EXCEEDED_MASK 0x00000004L
#define THM_TCON_THERM_TRIP__THERM_TP_SENSE_MASK 0x00000008L
#define THM_TCON_THERM_TRIP__RSVD2_MASK 0x00000010L
#define THM_TCON_THERM_TRIP__THERM_TP_EN_MASK 0x00000020L
#define THM_TCON_THERM_TRIP__THERM_TP_LMT_MASK 0x00003FC0L
#define THM_TCON_THERM_TRIP__RSVD3_MASK 0x7FFFC000L
#define THM_TCON_THERM_TRIP__SW_THERM_TP_MASK 0x80000000L
//THM_GPIO_PROCHOT_CTRL
#define THM_GPIO_PROCHOT_CTRL__TXIMPSEL__SHIFT 0x0
#define THM_GPIO_PROCHOT_CTRL__PD__SHIFT 0x1
#define THM_GPIO_PROCHOT_CTRL__PU__SHIFT 0x2
#define THM_GPIO_PROCHOT_CTRL__SCHMEN__SHIFT 0x3
#define THM_GPIO_PROCHOT_CTRL__S0__SHIFT 0x4
#define THM_GPIO_PROCHOT_CTRL__S1__SHIFT 0x5
#define THM_GPIO_PROCHOT_CTRL__RXEN__SHIFT 0x6
#define THM_GPIO_PROCHOT_CTRL__RXSEL0__SHIFT 0x7
#define THM_GPIO_PROCHOT_CTRL__RXSEL1__SHIFT 0x8
#define THM_GPIO_PROCHOT_CTRL__OE_OVERRIDE__SHIFT 0x10
#define THM_GPIO_PROCHOT_CTRL__OE__SHIFT 0x11
#define THM_GPIO_PROCHOT_CTRL__A_OVERRIDE__SHIFT 0x12
#define THM_GPIO_PROCHOT_CTRL__A__SHIFT 0x13
#define THM_GPIO_PROCHOT_CTRL__Y__SHIFT 0x1f
#define THM_GPIO_PROCHOT_CTRL__TXIMPSEL_MASK 0x00000001L
#define THM_GPIO_PROCHOT_CTRL__PD_MASK 0x00000002L
#define THM_GPIO_PROCHOT_CTRL__PU_MASK 0x00000004L
#define THM_GPIO_PROCHOT_CTRL__SCHMEN_MASK 0x00000008L
#define THM_GPIO_PROCHOT_CTRL__S0_MASK 0x00000010LAnnotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.