drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_10_1.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_10_1.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/ivsrcid/gfx/irqsrcs_gfx_10_1.h- Extension
.h- Size
- 3304 bytes
- Lines
- 54
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __IRQSRCS_GFX_10_1_H__
#define __IRQSRCS_GFX_10_1_H__
#define GFX_10_1__SRCID__CP_RB_INTERRUPT_PKT 176 // B0 CP_INTERRUPT pkt in RB
#define GFX_10_1__SRCID__CP_GENERIC_INT 177 // B1 MES GENERIC INT
#define GFX_10_1__SRCID__CP_IB1_INTERRUPT_PKT 177 // B1 CP_INTERRUPT pkt in IB1
#define GFX_10_1__SRCID__CP_IB2_INTERRUPT_PKT 178 // B2 CP_INTERRUPT pkt in IB2
#define GFX_10_1__SRCID__CP_PM4_PKT_RSVD_BIT_ERROR 180 // B4 PM4 Pkt Rsvd Bits Error
#define GFX_10_1__SRCID__CP_EOP_INTERRUPT 181 // B5 End-of-Pipe Interrupt
#define GFX_10_1__SRCID__CP_BAD_OPCODE_ERROR 183 // B7 Bad Opcode Error
#define GFX_10_1__SRCID__CP_PRIV_REG_FAULT 184 // B8 Privileged Register Fault
#define GFX_10_1__SRCID__CP_PRIV_INSTR_FAULT 185 // B9 Privileged Instr Fault
#define GFX_10_1__SRCID__CP_WAIT_MEM_SEM_FAULT 186 // BA Wait Memory Semaphore Fault (Synchronization Object Fault)
#define GFX_10_1__SRCID__CP_CTX_EMPTY_INTERRUPT 187 // BB Context Empty Interrupt
#define GFX_10_1__SRCID__CP_CTX_BUSY_INTERRUPT 188 // BC Context Busy Interrupt
#define GFX_10_1__SRCID__CP_ME_WAIT_REG_MEM_POLL_TIMEOUT 192 // C0 CP.ME Wait_Reg_Mem Poll Timeout
#define GFX_10_1__SRCID__CP_SIG_INCOMPLETE 193 // C1 "Surface Probe Fault Signal Incomplete"
#define GFX_10_1__SRCID__CP_PREEMPT_ACK 194 // C2 Preemption Ack-wledge
#define GFX_10_1__SRCID__CP_GPF 195 // C3 General Protection Fault (GPF)
#define GFX_10_1__SRCID__CP_GDS_ALLOC_ERROR 196 // C4 GDS Alloc Error
#define GFX_10_1__SRCID__CP_ECC_ERROR 197 // C5 ECC Error
#define GFX_10_1__SRCID__CP_COMPUTE_QUERY_STATUS 199 // C7 Compute query status
#define GFX_10_1__SRCID__CP_VM_DOORBELL 200 // C8 Unattached VM Doorbell Received
#define GFX_10_1__SRCID__CP_FUE_ERROR 201 // C9 ECC FUE Error
#define GFX_10_1__SRCID__RLC_STRM_PERF_MONITOR_INTERRUPT 202 // CA Streaming Perf Monitor Interrupt
#define GFX_10_1__SRCID__GRBM_RD_TIMEOUT_ERROR 232 // E8 CRead timeout error
#define GFX_10_1__SRCID__GRBM_REG_GUI_IDLE 233 // E9 Register GUI Idle
#define GFX_10_1__SRCID__SQ_INTERRUPT_ID 239 // EF SQ Interrupt (ttrace wrap, errors)
#endif
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.