drivers/gpu/drm/amd/include/ivsrcid/sdma1/irqsrcs_sdma1_5_0.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/ivsrcid/sdma1/irqsrcs_sdma1_5_0.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/ivsrcid/sdma1/irqsrcs_sdma1_5_0.h- Extension
.h- Size
- 2719 bytes
- Lines
- 45
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __IRQSRCS_SDMA1_5_0_H__
#define __IRQSRCS_SDMA1_5_0_H__
#define SDMA1_5_0__SRCID__SDMA_ATOMIC_RTN_DONE 217 // 0xD9 SDMA atomic*_rtn ops complete
#define SDMA1_5_0__SRCID__SDMA_ATOMIC_TIMEOUT 218 // 0xDA SDMA atomic CMPSWAP loop timeout
#define SDMA1_5_0__SRCID__SDMA_IB_PREEMPT 219 // 0xDB sdma mid-command buffer preempt interrupt
#define SDMA1_5_0__SRCID__SDMA_ECC 220 // 0xDC ECC Error
#define SDMA1_5_0__SRCID__SDMA_PAGE_FAULT 221 // 0xDD Page Fault Error from UTCL2 when nack=3
#define SDMA1_5_0__SRCID__SDMA_PAGE_NULL 222 // 0xDE Page Null from UTCL2 when nack=2
#define SDMA1_5_0__SRCID__SDMA_XNACK 223 // 0xDF Page retry timeout after UTCL2 return nack=1
#define SDMA1_5_0__SRCID__SDMA_TRAP 224 // 0xE0 Trap
#define SDMA1_5_0__SRCID__SDMA_SEM_INCOMPLETE_TIMEOUT 225 // 0xE1 0xDAGPF (Sem incomplete timeout)
#define SDMA1_5_0__SRCID__SDMA_SEM_WAIT_FAIL_TIMEOUT 226 // 0xE2 Semaphore wait fail timeout
#define SDMA1_5_0__SRCID__SDMA_SRAM_ECC 228 // 0xE4 SRAM ECC Error
#define SDMA1_5_0__SRCID__SDMA_PREEMPT 240 // 0xF0 SDMA New Run List
#define SDMA1_5_0__SRCID__SDMA_VM_HOLE 242 // 0xF2 MC or SEM address in VM hole
#define SDMA1_5_0__SRCID__SDMA_CTXEMPTY 243 // 0xF3 Context Empty
#define SDMA1_5_0__SRCID__SDMA_DOORBELL_INVALID 244 // 0xF4 Doorbell BE invalid
#define SDMA1_5_0__SRCID__SDMA_FROZEN 245 // 0xF5 SDMA Frozen
#define SDMA1_5_0__SRCID__SDMA_POLL_TIMEOUT 246 // 0xF6 SRBM read poll timeout
#define SDMA1_5_0__SRCID__SDMA_SRBMWRITE 247 // 0xF7 SRBM write Protection
#endif
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.