drivers/gpu/drm/amd/include/mes_v11_api_def.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/mes_v11_api_def.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/include/mes_v11_api_def.h- Extension
.h- Size
- 19312 bytes
- Lines
- 710
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct MES_API_STATUSstruct MES_LOG_CONTEXT_STATE_CHANGEstruct MES_LOG_QUEUE_NEW_WORKstruct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECTstruct MES_LOG_QUEUE_NO_MORE_WORKstruct MES_LOG_QUEUE_WAIT_SYNC_OBJECTstruct MES_LOG_ENTRY_HEADERstruct MES_LOG_ENTRY_DATAstruct MES_LOG_BUFFERstruct WRITE_REGstruct READ_REGstruct WAIT_REG_MEMstruct INV_GARTstruct QUERY_STATUSstruct SET_SHADER_DEBUGGERstruct CHANGE_CONFIGenum MES_API_TYPEenum MES_SCH_API_OPCODEenum MES_AMD_PRIORITY_LEVELenum MES_QUEUE_TYPEenum VM_HUB_TYPEenum SET_DEBUG_VMID_OPERATIONSenum MES_LOG_OPERATIONenum MES_LOG_CONTEXT_STATEenum MES_SWIP_TO_HWIP_DEFenum MESAPI_MISC_OPCODEenum WRM_OPERATIONenum MESAPI_MISC__CHANGE_CONFIG_OPTION
Annotated Snippet
struct MES_API_STATUS {
uint64_t api_completion_fence_addr;
uint64_t api_completion_fence_value;
};
enum { MAX_COMPUTE_PIPES = 8 };
enum { MAX_GFX_PIPES = 2 };
enum { MAX_SDMA_PIPES = 2 };
enum { MAX_COMPUTE_HQD_PER_PIPE = 8 };
enum { MAX_GFX_HQD_PER_PIPE = 8 };
enum { MAX_SDMA_HQD_PER_PIPE = 10 };
enum { MAX_SDMA_HQD_PER_PIPE_11_0 = 8 };
enum { MAX_QUEUES_IN_A_GANG = 8 };
enum VM_HUB_TYPE {
VM_HUB_TYPE_GC = 0,
VM_HUB_TYPE_MM = 1,
VM_HUB_TYPE_MAX,
};
enum { VMID_INVALID = 0xffff };
enum { MAX_VMID_GCHUB = 16 };
enum { MAX_VMID_MMHUB = 16 };
enum SET_DEBUG_VMID_OPERATIONS {
DEBUG_VMID_OP_PROGRAM = 0,
DEBUG_VMID_OP_ALLOCATE = 1,
DEBUG_VMID_OP_RELEASE = 2
};
enum MES_LOG_OPERATION {
MES_LOG_OPERATION_CONTEXT_STATE_CHANGE = 0,
MES_LOG_OPERATION_QUEUE_NEW_WORK = 1,
MES_LOG_OPERATION_QUEUE_UNWAIT_SYNC_OBJECT = 2,
MES_LOG_OPERATION_QUEUE_NO_MORE_WORK = 3,
MES_LOG_OPERATION_QUEUE_WAIT_SYNC_OBJECT = 4,
MES_LOG_OPERATION_QUEUE_INVALID = 0xF,
};
enum MES_LOG_CONTEXT_STATE {
MES_LOG_CONTEXT_STATE_IDLE = 0,
MES_LOG_CONTEXT_STATE_RUNNING = 1,
MES_LOG_CONTEXT_STATE_READY = 2,
MES_LOG_CONTEXT_STATE_READY_STANDBY = 3,
MES_LOG_CONTEXT_STATE_INVALID = 0xF,
};
struct MES_LOG_CONTEXT_STATE_CHANGE {
void *h_context;
enum MES_LOG_CONTEXT_STATE new_context_state;
};
struct MES_LOG_QUEUE_NEW_WORK {
uint64_t h_queue;
uint64_t reserved;
};
struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT {
uint64_t h_queue;
uint64_t h_sync_object;
};
struct MES_LOG_QUEUE_NO_MORE_WORK {
uint64_t h_queue;
uint64_t reserved;
};
struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT {
uint64_t h_queue;
uint64_t h_sync_object;
};
struct MES_LOG_ENTRY_HEADER {
uint32_t first_free_entry_index;
uint32_t wraparound_count;
uint64_t number_of_entries;
uint64_t reserved[2];
};
struct MES_LOG_ENTRY_DATA {
uint64_t gpu_time_stamp;
uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */
uint32_t reserved_operation_type_bits;
union {
struct MES_LOG_CONTEXT_STATE_CHANGE context_state_change;
struct MES_LOG_QUEUE_NEW_WORK queue_new_work;
struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT queue_unwait_sync_object;
Annotation
- Detected declarations: `struct MES_API_STATUS`, `struct MES_LOG_CONTEXT_STATE_CHANGE`, `struct MES_LOG_QUEUE_NEW_WORK`, `struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT`, `struct MES_LOG_QUEUE_NO_MORE_WORK`, `struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT`, `struct MES_LOG_ENTRY_HEADER`, `struct MES_LOG_ENTRY_DATA`, `struct MES_LOG_BUFFER`, `struct WRITE_REG`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.