drivers/gpu/drm/amd/include/mes_v12_api_def.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/mes_v12_api_def.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/include/mes_v12_api_def.h
Extension
.h
Size
26329 bytes
Lines
961
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct MES_API_STATUS {
	uint64_t api_completion_fence_addr;
	uint64_t api_completion_fence_value;
};

/*
 * MES will set api_completion_fence_value in api_completion_fence_addr
 * when it can successflly process the API. MES will also trigger
 * following interrupt when it finish process the API no matter success
 * or failed.
 *     Interrupt source id 181 (EOP) with context ID (DW 6 in the int
 *     cookie) set to 0xb1 and context type set to 8. Driver side need
 *     to enable TIME_STAMP_INT_ENABLE in CPC_INT_CNTL for MES pipe to
 *     catch this interrupt.
 *     Driver side also need to set enable_mes_fence_int = 1 in
 *     set_HW_resource package to enable this fence interrupt.
 * when the API process failed.
 *     lowre 32 bits set to 0.
 *     higher 32 bits set as follows (bit shift within high 32)
 *         bit 0  -  7    API specific error code.
 *         bit 8  - 15    API OPCODE.
 *         bit 16 - 23    MISC OPCODE if any
 *         bit 24 - 30    ERROR category (API_ERROR_XXX)
 *         bit 31         Set to 1 to indicate error status
 *
 */
enum { MES_SCH_ERROR_CODE_HEADER_SHIFT_12 = 8 };
enum { MES_SCH_ERROR_CODE_MISC_OP_SHIFT_12 = 16 };
enum { MES_ERROR_CATEGORY_SHIFT_12 = 24 };
enum { MES_API_STATUS_ERROR_SHIFT_12 = 31 };

enum MES_ERROR_CATEGORY_CODE_12 {
	MES_ERROR_API                = 1,
	MES_ERROR_SCHEDULING         = 2,
	MES_ERROR_UNKNOWN            = 3,
};

#define MES_ERR_CODE(api_err, opcode, misc_op, category) \
			((uint64) (api_err | opcode << MES_SCH_ERROR_CODE_HEADER_SHIFT_12 | \
			misc_op << MES_SCH_ERROR_CODE_MISC_OP_SHIFT_12 | \
			category << MES_ERROR_CATEGORY_SHIFT_12 | \
			1 << MES_API_STATUS_ERROR_SHIFT_12) << 32)

enum { MAX_COMPUTE_PIPES = 8 };
enum { MAX_GFX_PIPES	 = 2 };
enum { MAX_SDMA_PIPES	 = 2 };

enum { MAX_COMPUTE_HQD_PER_PIPE		= 8 };
enum { MAX_GFX_HQD_PER_PIPE		= 8 };
enum { MAX_SDMA_HQD_PER_PIPE		= 10 };
enum { MAX_SDMA_HQD_PER_PIPE_11_0	= 8 };


enum { MAX_QUEUES_IN_A_GANG = 8 };

enum VM_HUB_TYPE {
	VM_HUB_TYPE_GC = 0,
	VM_HUB_TYPE_MM = 1,

	VM_HUB_TYPE_MAX,
};

enum { VMID_INVALID = 0xffff };

enum { MAX_VMID_GCHUB = 16 };
enum { MAX_VMID_MMHUB = 16 };

enum SET_DEBUG_VMID_OPERATIONS {
	DEBUG_VMID_OP_PROGRAM	= 0,
	DEBUG_VMID_OP_ALLOCATE	= 1,
	DEBUG_VMID_OP_RELEASE	= 2,
	DEBUG_VMID_OP_VM_SETUP	= 3 // used to set up the debug vmid page table in the kernel queue case (mode 1)
};

enum MES_MS_LOG_CONTEXT_STATE {
	MES_LOG_CONTEXT_STATE_IDLE		= 0,
	MES_LOG_CONTEXT_STATE_RUNNING		= 1,
	MES_LOG_CONTEXT_STATE_READY		= 2,
	MES_LOG_CONTEXT_STATE_READY_STANDBY	= 3,
	MES_LOG_CONTEXT_STATE_INVALID		= 0xF,
};

enum MES_MS_LOG_OPERATION {
	MES_LOG_OPERATION_CONTEXT_STATE_CHANGE		= 0,
	MES_LOG_OPERATION_QUEUE_NEW_WORK		= 1,
	MES_LOG_OPERATION_QUEUE_UNWAIT_SYNC_OBJECT	= 2,
	MES_LOG_OPERATION_QUEUE_NO_MORE_WORK		= 3,
	MES_LOG_OPERATION_QUEUE_WAIT_SYNC_OBJECT	= 4,
	MES_LOG_OPERATION_QUEUE_INVALID			= 0xF,
};

Annotation

Implementation Notes