drivers/gpu/drm/amd/include/v10_structs.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/include/v10_structs.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/amd/include/v10_structs.h
Extension: .h
Size: 47343 bytes
Lines: 1258
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

struct v10_gfx_mqd
struct v10_sdma_mqd
struct v10_compute_mqd
struct v10_ce_ib_state
struct v10_de_ib_state
struct v10_gfx_meta_data

Annotated Snippet

struct v10_gfx_mqd {
	uint32_t reserved_0; // offset: 0  (0x0)
	uint32_t reserved_1; // offset: 1  (0x1)
	uint32_t reserved_2; // offset: 2  (0x2)
	uint32_t reserved_3; // offset: 3  (0x3)
	uint32_t reserved_4; // offset: 4  (0x4)
	uint32_t reserved_5; // offset: 5  (0x5)
	uint32_t reserved_6; // offset: 6  (0x6)
	uint32_t reserved_7; // offset: 7  (0x7)
	uint32_t reserved_8; // offset: 8  (0x8)
	uint32_t reserved_9; // offset: 9  (0x9)
	uint32_t reserved_10; // offset: 10  (0xA)
	uint32_t reserved_11; // offset: 11  (0xB)
	uint32_t reserved_12; // offset: 12  (0xC)
	uint32_t reserved_13; // offset: 13  (0xD)
	uint32_t reserved_14; // offset: 14  (0xE)
	uint32_t reserved_15; // offset: 15  (0xF)
	uint32_t reserved_16; // offset: 16  (0x10)
	uint32_t reserved_17; // offset: 17  (0x11)
	uint32_t reserved_18; // offset: 18  (0x12)
	uint32_t reserved_19; // offset: 19  (0x13)
	uint32_t reserved_20; // offset: 20  (0x14)
	uint32_t reserved_21; // offset: 21  (0x15)
	uint32_t reserved_22; // offset: 22  (0x16)
	uint32_t reserved_23; // offset: 23  (0x17)
	uint32_t reserved_24; // offset: 24  (0x18)
	uint32_t reserved_25; // offset: 25  (0x19)
	uint32_t reserved_26; // offset: 26  (0x1A)
	uint32_t reserved_27; // offset: 27  (0x1B)
	uint32_t reserved_28; // offset: 28  (0x1C)
	uint32_t reserved_29; // offset: 29  (0x1D)
	uint32_t reserved_30; // offset: 30  (0x1E)
	uint32_t reserved_31; // offset: 31  (0x1F)
	uint32_t reserved_32; // offset: 32  (0x20)
	uint32_t reserved_33; // offset: 33  (0x21)
	uint32_t reserved_34; // offset: 34  (0x22)
	uint32_t reserved_35; // offset: 35  (0x23)
	uint32_t reserved_36; // offset: 36  (0x24)
	uint32_t reserved_37; // offset: 37  (0x25)
	uint32_t reserved_38; // offset: 38  (0x26)
	uint32_t reserved_39; // offset: 39  (0x27)
	uint32_t reserved_40; // offset: 40  (0x28)
	uint32_t reserved_41; // offset: 41  (0x29)
	uint32_t reserved_42; // offset: 42  (0x2A)
	uint32_t reserved_43; // offset: 43  (0x2B)
	uint32_t reserved_44; // offset: 44  (0x2C)
	uint32_t reserved_45; // offset: 45  (0x2D)
	uint32_t reserved_46; // offset: 46  (0x2E)
	uint32_t reserved_47; // offset: 47  (0x2F)
	uint32_t reserved_48; // offset: 48  (0x30)
	uint32_t reserved_49; // offset: 49  (0x31)
	uint32_t reserved_50; // offset: 50  (0x32)
	uint32_t reserved_51; // offset: 51  (0x33)
	uint32_t reserved_52; // offset: 52  (0x34)
	uint32_t reserved_53; // offset: 53  (0x35)
	uint32_t reserved_54; // offset: 54  (0x36)
	uint32_t reserved_55; // offset: 55  (0x37)
	uint32_t reserved_56; // offset: 56  (0x38)
	uint32_t reserved_57; // offset: 57  (0x39)
	uint32_t reserved_58; // offset: 58  (0x3A)
	uint32_t reserved_59; // offset: 59  (0x3B)
	uint32_t reserved_60; // offset: 60  (0x3C)
	uint32_t reserved_61; // offset: 61  (0x3D)
	uint32_t reserved_62; // offset: 62  (0x3E)
	uint32_t reserved_63; // offset: 63  (0x3F)
	uint32_t reserved_64; // offset: 64  (0x40)
	uint32_t reserved_65; // offset: 65  (0x41)
	uint32_t reserved_66; // offset: 66  (0x42)
	uint32_t reserved_67; // offset: 67  (0x43)
	uint32_t reserved_68; // offset: 68  (0x44)
	uint32_t reserved_69; // offset: 69  (0x45)
	uint32_t reserved_70; // offset: 70  (0x46)
	uint32_t reserved_71; // offset: 71  (0x47)
	uint32_t reserved_72; // offset: 72  (0x48)
	uint32_t reserved_73; // offset: 73  (0x49)
	uint32_t reserved_74; // offset: 74  (0x4A)
	uint32_t reserved_75; // offset: 75  (0x4B)
	uint32_t reserved_76; // offset: 76  (0x4C)
	uint32_t reserved_77; // offset: 77  (0x4D)
	uint32_t reserved_78; // offset: 78  (0x4E)
	uint32_t reserved_79; // offset: 79  (0x4F)
	uint32_t reserved_80; // offset: 80  (0x50)
	uint32_t reserved_81; // offset: 81  (0x51)
	uint32_t reserved_82; // offset: 82  (0x52)
	uint32_t reserved_83; // offset: 83  (0x53)
	uint32_t reserved_84; // offset: 84  (0x54)
	uint32_t reserved_85; // offset: 85  (0x55)
	uint32_t reserved_86; // offset: 86  (0x56)
	uint32_t reserved_87; // offset: 87  (0x57)
	uint32_t reserved_88; // offset: 88  (0x58)

Annotation

Detected declarations: `struct v10_gfx_mqd`, `struct v10_sdma_mqd`, `struct v10_compute_mqd`, `struct v10_ce_ib_state`, `struct v10_de_ib_state`, `struct v10_gfx_meta_data`.
Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.